mtd: nand: lpc32xx_slc: fix potential overflow over 4 bits

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In case if quotient of controller clock rate to device clock rate does
not fit into 4 bit value, choose the maximum acceptable value 0xF, which
stands for 16 clocks.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>

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Vladimir Zapolskiy 2015-10-01 02:23:36 +03:00 • committed by Brian Norris

parent 641f6342f5

commit 08d3cd5ef0

1 changed files with 1 additions and 1 deletions

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drivers/mtd/nand/lpc32xx_slc.c

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