drm/xe/xe_gt_idle: add debugfs entry for powergating info

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Coarse Powergating is a power saving technique where Render and Media
can be power-gated independently irrespective of the rest of the GT.

For debug purposes, it is useful to expose the powergating information.

v2: move to debugfs
    add details to commit message
    add per-slice status for media
    define reg bits in descending order (Matt Roper)

v3: fix return statement
    fix kernel-doc
    use loop for media slices
    use helper function for status (Michal)

v4: add pg prefix
    do not wake GT if in C6 (Badal)

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Badal Nilawar <badal.nilawar@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240906071126.28078-3-riana.tauro@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

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Riana Tauro 2024-09-06 12:41:26 +05:30 • committed by Rodrigo Vivi

parent c2bf07dd0b

commit 0914c1e45d

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8

drivers/gpu/drm/xe/regs/xe_gt_regs.h

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13

drivers/gpu/drm/xe/xe_gt_debugfs.c

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91

drivers/gpu/drm/xe/xe_gt_idle.c

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2

drivers/gpu/drm/xe/xe_gt_idle.h

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