e1000e: clear DPG_EN after reset to avoid autonomous power-gating

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Panther Lake systems introduced an autonomous power gating feature for
the integrated Gigabit Ethernet in shutdown state (S5) state. As part of
it, the reset value of DPG_EN bit was changed to 1. Clear this bit after
performing hardware reset to avoid errors such as Tx/Rx hangs, or packet
loss/corruption.

Fixes: 0c9183ce61 ("e1000e: Add support for the next LOM generation")
Signed-off-by: Vitaly Lifshits <vitaly.lifshits@intel.com>
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Tested-by: Avigail Dahan <avigailx.dahan@intel.com>
Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>

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Vitaly Lifshits 2026-01-06 16:14:20 +02:00 • committed by Tony Nguyen

parent 5b644464ee

commit 0942fc6d32

2 changed files with 10 additions and 0 deletions

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1

drivers/net/ethernet/intel/e1000e/defines.h

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9

drivers/net/ethernet/intel/e1000e/ich8lan.c

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