drm/amd/display: Do not set drr on pipe commit

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[WHY]
Writing to DRR registers such as OTG_V_TOTAL_MIN on the same frame as a
pipe commit can cause underflow.

[HOW]
Move DMUB p-state delegate into optimze_bandwidth; enabling FAMS sets
optimized_required.

This change expects that Freesync requests are blocked when
optimized_required is true.

Fixes: 613a7956de ("drm/amd/display: Add monitor specific edid quirk")
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Wesley Chalmers 2022-11-03 22:29:31 -04:00 • committed by Alex Deucher

parent 08e8521576

commit 09c8cbedba

2 changed files with 13 additions and 0 deletions

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6

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c

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7

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c

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