drm/i915: Limit the display memory alignment to 32 bit instead of 64

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The coming commit "drm/i915: Introduce guard pages to i915_vma"
from Chris, was originally changing display_alignment to u32
from u64. The reason is that the display GGTT is and will be
limited o 4GB.

Put it in a separate patch and use "max(...)" instead of
"max_t(64, ...)" when asigning the value. We can safely use max
as we know beforehand that the comparison is between two u32
variables.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221130235805.221010-2-andi.shyti@linux.intel.com

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This commit is contained in:

Andi Shyti 2022-12-01 00:58:01 +01:00

parent f2053d3466

commit 09f9b4418e

3 changed files with 3 additions and 3 deletions

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2

drivers/gpu/drm/i915/display/intel_fb_pin.c

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2

drivers/gpu/drm/i915/gem/i915_gem_domain.c

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2

drivers/gpu/drm/i915/i915_vma_types.h

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