drm/amd/display: Change min_h_sync_width from 8 to 4

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[Why]
Some display's hsync width is lower than the minimum dcn20 is set
to support right now. This will cause optc1_validate_timing to fail which
eventually will result in wrong set mode. This was set to 8 as per
HW team's request for no valid reason.

[How]
Changing min_h_sync_width to 4 will let us validate timing for
preffered mode and light up the headset. This change was made
to Vega 10 before for a similar issue.

Signed-off-by: Fatemeh Darbehani <fatemeh.darbehani@amd.com>
Reviewed-by: Joshua Aberback <Joshua.Aberback@amd.com>
Acked-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Fatemeh Darbehani 2019-06-21 17:44:50 -04:00 • committed by Alex Deucher

parent 74eda776d7

commit 09fc26c171

1 changed files with 1 additions and 1 deletions

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drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c

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