drm/kmb: Enable LCD DMA for low TVDDCV

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There's an undocumented dependency between LCD layer enable bits [2-5]
and the AXI pipelined read enable bit [28] in the LCD_CONTROL register.
The proper order of operation is:

1) Clear AXI pipelined read enable bit
2) Set LCD layers
3) Set AXI pipelined read enable bit

With this update, LCD can start DMA when TVDDCV is reduced down to 700mV.

Fixes: 7f7b96a8a0 ("drm/kmb: Add support for KeemBay Display")
Signed-off-by: Edmund Dea <edmund.j.dea@intel.com>
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210728003126.1425028-1-anitha.chrisanthus@intel.com

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Edmund Dea 2020-08-25 14:51:17 -07:00 • committed by Anitha Chrisanthus

parent 8ee18e769d

commit 0aab5dce39

2 changed files with 27 additions and 2 deletions

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14

drivers/gpu/drm/kmb/kmb_drv.c

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15

drivers/gpu/drm/kmb/kmb_plane.c

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