clk: sunxi: Add support for bus clock gates on Allwinner A80 SoC

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This adds the gate clocks for AHB/APB busses on the A80 SoC.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

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Chen-Yu Tsai 2014-10-20 22:10:28 +08:00 • committed by Maxime Ripard

parent 3b2bd70f03

commit 0b0f08028e

2 changed files with 36 additions and 0 deletions

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5

Documentation/devicetree/bindings/clock/sunxi.txt

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31

drivers/clk/sunxi/clk-sunxi.c

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