drm/amd/display: DP YCbCr 4:2:0 support

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Update MSA MISC1 bit 6 programming to handle YCbCr 4:2:0
and BT2020 cases.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Eric Bernstein 2018-05-14 17:01:00 -04:00 • committed by Alex Deucher

parent 8de94233f4

commit 0b126112e9

1 changed files with 12 additions and 2 deletions

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14

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

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