iio: dac: ad3552r: add high-speed platform driver

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Add High Speed ad3552r platform driver.

The ad3552r DAC is controlled by a custom (fpga-based) DAC IP
through the current AXI backend, or similar alternative IIO backend.

Compared to the existing driver (ad3552r.c), that is a simple SPI
driver, this driver is coupled with a DAC IIO backend that finally
controls the ad3552r by a fpga-based "QSPI+DDR" interface, to reach
maximum transfer rate of 33MUPS using dma stream capabilities.

All commands involving QSPI bus read/write are delegated to the backend
through the provided APIs for bus read/write.

Reviewed-by: Nuno Sa <nuno.sa@analog.com>
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
Reviewed-by: David Lechner <dlechner@baylibre.com>
Link: https://patch.msgid.link/20241028-wip-bl-ad3552r-axi-v0-iio-testing-v9-7-f6960b4f9719@kernel-space.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

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This commit is contained in:

Angelo Dureghello 2024-10-28 22:45:34 +01:00 • committed by Jonathan Cameron

parent f665d7d33d

commit 0b4d9fe58b

5 changed files with 574 additions and 1 deletions

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19

drivers/iio/dac/Kconfig

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4

drivers/iio/dac/Makefile

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529

drivers/iio/dac/ad3552r-hs.c

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19

drivers/iio/dac/ad3552r-hs.h

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4

drivers/iio/dac/ad3552r.h

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