drm/i915/icl: restore WaEnableFloatBlendOptimization

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Enables blend optimization for floating point RTs

This restores the workaround that was reverted in c358514ba8
("Revert "drm/i915/icl: WaEnableFloatBlendOptimization"").

The revert was due to the register write seemingly not sticking,
but the HW team has confirmed that this is because the
register is WO and that the workaround is indeed required.

Here the wa is added with a mask of 0 since the register is WO.

References: https://hsdes.intel.com/resource/1408134172
References: https://bugs.freedesktop.org/show_bug.cgi?id=107338
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>

Signed-off-by: Talha Nassar <talha.nassar@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/1548983324-15344-4-git-send-email-talha.nassar@intel.com

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This commit is contained in:

Talha Nassar 2019-01-31 17:08:44 -08:00 • committed by Chris Wilson

parent ae598b0d6b

commit 0b904c890a

2 changed files with 9 additions and 0 deletions

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3

drivers/gpu/drm/i915/i915_reg.h

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6

drivers/gpu/drm/i915/intel_workarounds.c

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