drm/amd/display: Write flip addr to scratch reg for subvp

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[Description]
SubVP needs to "calculate" the earliest in use META address
by using the current primary / meta addresses, but this leads
to a race condition where FW and driver can read/write the
address at the same time and intermittently produce inconsistent
address offsets. To mitigate this issue without locking (too slow),
save each surface flip addr into scratch registers and use this
to keep track of the earliest in use META addres.

Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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This commit is contained in:

Alvin Lee 2023-08-10 11:50:52 -04:00 • committed by Alex Deucher

parent ec4247823b

commit 0b9dc439f4

11 changed files with 134 additions and 1 deletions

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23

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

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5

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

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1

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

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12

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c

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18

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

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2

drivers/gpu/drm/amd/display/dc/inc/core_types.h

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10

drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h

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17

drivers/gpu/drm/amd/display/dmub/dmub_srv.h

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30

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c

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7

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h

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10

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

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