coresight: Extend the PIDR mask to cover relevant bits in PIDR2

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As per coresight standards, PIDR2 register has the following format :

 [2-0]	- JEP106_bits6to4
 [3]	- JEDEC, designer ID is specified by JEDEC.

However some of the drivers only use mask of 0x3 for the PIDR2 leaving
bits [3-2] unchecked, which could potentially match the component for
a different device altogether. This patch fixes the mask and the
corresponding id bits for the existing devices.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

...

This commit is contained in:

Suzuki K Poulose 2017-10-10 14:32:12 -06:00 • committed by Greg Kroah-Hartman

parent 58f2c391cc

commit 0bbb194c0c

7 changed files with 26 additions and 26 deletions

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4

drivers/hwtracing/coresight/coresight-dynamic-replicator.c

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4

drivers/hwtracing/coresight/coresight-etb10.c

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24

drivers/hwtracing/coresight/coresight-etm3x.c

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4

drivers/hwtracing/coresight/coresight-funnel.c

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8

drivers/hwtracing/coresight/coresight-stm.c

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4

drivers/hwtracing/coresight/coresight-tmc.c

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4

drivers/hwtracing/coresight/coresight-tpiu.c

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