clk: rockchip: rk3368: enable the CLK_SET_RATE_PARENT flag for spdif_8ch

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SPDIF_8CH set freq need to select parent and calculate parent freq.
so just mark it as the CLK_SET_RATE_PARENT flag.

Signed-off-by: zhangqing <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

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zhangqing 2016-01-25 08:56:01 -08:00 • committed by Heiko Stuebner

parent d566ebc3c0

commit 0bbe62eb92

1 changed files with 1 additions and 1 deletions

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drivers/clk/rockchip/clk-rk3368.c

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