drm/amd/display: update dispclk and dppclk vco frequency

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Value obtained from DV is not allowing 8k60 CTA mode with DSC to
pass, after checking real value being used in hw, find out that
correct value is 3600, which will allow that mode.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Eric Yang 2019-11-15 12:04:25 -05:00 • committed by Alex Deucher

parent 00853a4f7d

commit 0beb54039d

1 changed files with 1 additions and 1 deletions

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drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c

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