clk: qcom: gcc-kaanapali: Fix always-enabling PCIE_RSCC clocks

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The critical_cbrcrs array will get qcom_branch_set_clk_en() called on
each entry which will set BIT(0) to enable the clock. This is however
wrong for these two PCIE_RSCC clocks which need BIT(20) and BIT(21) set
respectively to enable them.

Fixes: d1919c375f ("clk: qcom: Add support for Global clock controller on Kaanapali")
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20260807-various-pcie-clk-fix-v1-3-5caf78a599d7@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

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Luca Weiss 2026-08-07 09:46:06 +02:00 • committed by Bjorn Andersson

parent 62bbf7ed9a

commit 0bfb542fc3

1 changed files with 4 additions and 2 deletions

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drivers/clk/qcom/gcc-kaanapali.c

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