RISC-V: KVM: Implement perf support without sampling

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RISC-V SBI PMU & Sscofpmf ISA extension allows supporting perf in
the virtualization enviornment as well. KVM implementation
relies on SBI PMU extension for the most part while trapping
& emulating the CSRs read for counter access.

This patch doesn't have the event sampling support yet.

Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>

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Atish Patra 2023-02-07 17:44:28 +05:30 • committed by Anup Patel

parent a9ac6c3752

commit 0cb74b65d2

1 changed files with 356 additions and 4 deletions

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arch/riscv/kvm/vcpu_pmu.c

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