RISC-V: Add Smcsrind and Sscsrind ISA extension definition and parsing

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The S[m|s]csrind extensions extend the indirect CSR access mechanism
defined in Smaia/Ssaia extensions.

This patch just enables the definition and parsing.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Charlie Jenkins <thecharlesjenkins@gmail.com>
Tested-by: Charlie Jenkins <thecharlesjenkins@gmail.com>
[pjw@kernel.org: use official RISC-V extension names in the patch description]
Link: https://patch.msgid.link/20260807-counter_delegation-v9-3-58658104e487@meta.com
Signed-off-by: Paul Walmsley <pjw@kernel.org>

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Atish Patra 2026-08-07 19:24:31 -06:00 • committed by Paul Walmsley

parent 09b5f358e8

commit 0ce0702f5e

2 changed files with 6 additions and 0 deletions

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4

arch/riscv/include/asm/hwcap.h

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2

arch/riscv/kernel/cpufeature.c

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