ARM: mvebu: add Device Tree description of the Armada 380/385 SoCs

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The Armada 380 and 385 SoCs are new SoCs from Marvell, based on a
Cortex-A9 cores (single core for 380, dual core for 385) and a number
of hardware blocks that are common with earlier SoCs from the mvebu
family.

The provided Device Tree describes the following parts of the SoC:

 * CPU
 * Device Bus
 * Clocks
 * Interrupt controllers: GIC and MPIC
 * GPIO controllers
 * I2C buses
 * L2 cache
 * MBus controller
 * Pinctrl
 * Serial
 * SPI buses
 * System controller (for reboot)
 * Timer
 * XOR engines
 * PCIe controllers
 * Network interfaces

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

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Thomas Petazzoni 2014-02-17 15:23:28 +01:00 • committed by Jason Cooper

parent 44e255a584

commit 0d3d96ab00

3 changed files with 611 additions and 0 deletions

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117

arch/arm/boot/dts/armada-380.dtsi

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149

arch/arm/boot/dts/armada-385.dtsi

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345

arch/arm/boot/dts/armada-38x.dtsi

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