[PATCH] x86_64: On Intel systems when CPU has C3 don't use TSC

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On Intel systems generally the TSC stops in C3 or deeper,
so don't use it there. Follows similar logic on i386.

This should fix problems on Meroms.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

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Andi Kleen 2006-07-29 21:42:37 +02:00 • committed by Linus Torvalds

parent 260f659b23

commit 0e5f61b00c

1 changed files with 12 additions and 4 deletions

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arch/x86_64/kernel/time.c

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