From 8892a1e1108e0aec956bd36d4079d56fcb41229f Mon Sep 17 00:00:00 2001 From: Sean Nyekjaer Date: Wed, 16 Aug 2023 14:24:21 +0200 Subject: [PATCH 01/20] ARM: dts: stm32: Add alternate pinmux for i2s pins Add another mux option for i2s pins, this is used on Octavo OSD32MP1-RED board. Signed-off-by: Sean Nyekjaer Reviewed-by: Olivier Moysan Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi index 098153ee99a3..92726ad7285f 100644 --- a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi @@ -787,6 +787,25 @@ pins { }; }; + i2s2_pins_b: i2s2-1 { + pins { + pinmux = , /* I2S2_SDO */ + , /* I2S2_WS */ + ; /* I2S2_CK */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + }; + + i2s2_sleep_pins_b: i2s2-sleep-1 { + pins { + pinmux = , /* I2S2_SDO */ + , /* I2S2_WS */ + ; /* I2S2_CK */ + }; + }; + ltdc_pins_a: ltdc-0 { pins { pinmux = , /* LCD_CLK */ From e404979e55603ef8564fe6cf7c4368aa6aaee719 Mon Sep 17 00:00:00 2001 From: Sean Nyekjaer Date: Wed, 16 Aug 2023 14:24:22 +0200 Subject: [PATCH 02/20] ARM: dts: stm32: Add alternate pinmux for ldtc pins Add another mux option for ltdc pins, this is used on Octavo OSD32MP1-RED board. Signed-off-by: Sean Nyekjaer Reviewed-by: Olivier Moysan Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi | 75 +++++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi index 92726ad7285f..5de4ec547411 100644 --- a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi @@ -1080,6 +1080,81 @@ pins { }; }; + ltdc_pins_e: ltdc-4 { + pins1 { + pinmux = , /* LTDC_R0 */ + , /* LTDC_R1 */ + , /* LTDC_R2 */ + , /* LTDC_R3 */ + , /* LTDC_R4 */ + , /* LTDC_R5 */ + , /* LTDC_R6 */ + , /* LTDC_R7 */ + , /* LTDC_G0 */ + , /* LTDC_G1 */ + , /* LTDC_G2 */ + , /* LTDC_G3 */ + , /* LTDC_G4 */ + , /* LTDC_G5 */ + , /* LTDC_G6 */ + , /* LTDC_G7 */ + , /* LTDC_B0 */ + , /* LTDC_B1 */ + , /* LTDC_B2 */ + , /* LTDC_B3 */ + , /* LTDC_B4 */ + , /* LTDC_B5 */ + , /* LTDC_B6 */ + , /* LTDC_B7 */ + , /* LTDC_DE */ + , /* LTDC_VSYNC */ + ; /* LTDC_HSYNC */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + + pins2 { + pinmux = ; /* LTDC_CLK */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + }; + + ltdc_sleep_pins_e: ltdc-sleep-4 { + pins { + pinmux = , /* LTDC_R0 */ + , /* LTDC_R1 */ + , /* LTDC_R2 */ + , /* LTDC_R3 */ + , /* LTDC_R4 */ + , /* LTDC_R5 */ + , /* LTDC_R6 */ + , /* LTDC_R7 */ + , /* LTDC_B0 */ + , /* LTDC_B1 */ + , /* LTDC_B2 */ + , /* LTDC_B3 */ + , /* LTDC_B4 */ + , /* LTDC_B5 */ + , /* LTDC_B6 */ + , /* LTDC_B7 */ + , /* LTDC_G0 */ + , /* LTDC_G1 */ + , /* LTDC_G2 */ + , /* LTDC_G3 */ + , /* LTDC_G4 */ + , /* LTDC_G5 */ + , /* LTDC_G6 */ + , /* LTDC_G7 */ + , /* LTDC_DE */ + , /* LTDC_VSYNC */ + , /* LTDC_HSYNC */ + ; /* LTDC_CLK */ + }; + }; + mco1_pins_a: mco1-0 { pins { pinmux = ; /* MCO1 */ From 12cf3ed9df313394462ab4d49f7cc5c00d9b20e6 Mon Sep 17 00:00:00 2001 From: Sean Nyekjaer Date: Wed, 16 Aug 2023 14:24:23 +0200 Subject: [PATCH 03/20] ARM: dts: stm32: Add alternate pinmux for can pins Add another mux option for can pins, this is used on Octavo OSD32MP1-RED board. Signed-off-by: Sean Nyekjaer Reviewed-by: Olivier Moysan Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi index 5de4ec547411..5af271e7f739 100644 --- a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi @@ -1245,6 +1245,26 @@ pins { }; }; + m_can1_pins_d: m-can1-3 { + pins1 { + pinmux = ; /* CAN1_TX */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = ; /* CAN1_RX */ + bias-disable; + }; + }; + + m_can1_sleep_pins_d: m_can1-sleep-3 { + pins { + pinmux = , /* CAN1_TX */ + ; /* CAN1_RX */ + }; + }; + m_can2_pins_a: m-can2-0 { pins1 { pinmux = ; /* CAN2_TX */ From 37bd2f3dab07eec465c3699e9ea1e3e9185a4966 Mon Sep 17 00:00:00 2001 From: Sean Nyekjaer Date: Wed, 16 Aug 2023 14:24:24 +0200 Subject: [PATCH 04/20] ARM: dts: stm32: osd32: fix ldo1 not required to be always-on MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit According to the OSD32MP1 Power System overview[1] there is no hard requirement for the ldo1 to be always-on. [1]: https://octavosystems.com/app_notes/osd32mp1-power-system-overview/#connections Signed-off-by: Sean Nyekjaer Acked-by: Leonard Göhrs Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi index a43965c86fe8..eb43a1e3a0c9 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi @@ -117,9 +117,7 @@ v1v8_audio: ldo1 { regulator-name = "v1v8_audio"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - regulator-always-on; interrupts = ; - }; v3v3_hdmi: ldo2 { From 0624f833de22ba4013d801be7b48200d3e2a6b18 Mon Sep 17 00:00:00 2001 From: Sean Nyekjaer Date: Wed, 16 Aug 2023 14:24:25 +0200 Subject: [PATCH 05/20] ARM: dts: stm32: osd32: fix ldo2 not required to be always-on MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit According to the OSD32MP1 Power System overview[1] there is no hard requirement for the ldo2 to be always-on. [1]: https://octavosystems.com/app_notes/osd32mp1-power-system-overview/#connections Signed-off-by: Sean Nyekjaer Acked-by: Leonard Göhrs Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi index eb43a1e3a0c9..902ca6c23533 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi @@ -124,9 +124,7 @@ v3v3_hdmi: ldo2 { regulator-name = "v3v3_hdmi"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - regulator-always-on; interrupts = ; - }; vtt_ddr: ldo3 { From 8c4904488fbc6516f0faaa4b011e0bafcd296087 Mon Sep 17 00:00:00 2001 From: Sean Nyekjaer Date: Wed, 16 Aug 2023 14:24:26 +0200 Subject: [PATCH 06/20] ARM: dts: stm32: lxa-tac: remove v3v3_hdmi override Patch "ARM: dts: stm32: osd32: fix ldo2 not required to be always-on" is making this property delete obsolete. Signed-off-by: Sean Nyekjaer Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi b/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi index 184b8bb4ebbf..f09b7c384bd9 100644 --- a/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi @@ -597,10 +597,6 @@ &usbphyc_port1 { phy-supply = <&vdd_usb>; }; -&v3v3_hdmi { - /delete-property/regulator-always-on; -}; - &vrefbuf { regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; From 3028aeb32f2d56fb1bdbfbf42ea3d88a9fed2bef Mon Sep 17 00:00:00 2001 From: Sean Nyekjaer Date: Wed, 16 Aug 2023 14:24:27 +0200 Subject: [PATCH 07/20] ARM: dts: stm32: osd32: fix ldo6 not required to be always-on MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit According to the OSD32MP1 Power System overview[1] there is no hard requirement for the ldo6 to be always-on. [1]: https://octavosystems.com/app_notes/osd32mp1-power-system-overview/#connections Signed-off-by: Sean Nyekjaer Acked-by: Leonard Göhrs Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi index 902ca6c23533..aeb71c41a734 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi @@ -152,9 +152,7 @@ v1v2_hdmi: ldo6 { regulator-name = "v1v2_hdmi"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; - regulator-always-on; interrupts = ; - }; vref_ddr: vref_ddr { From f186a915ff8ce6d899e7f6d230199b762eac9ee8 Mon Sep 17 00:00:00 2001 From: Sean Nyekjaer Date: Wed, 16 Aug 2023 14:24:28 +0200 Subject: [PATCH 08/20] dt-bindings: arm: stm32: add extra SiP compatible for oct,stm32mp157c-osd32-red Add binding support for the Octavo OSD32MP1-RED development board. General features: - STM32MP157C - 512MB DDR3 - CAN-FD - HDMI - USB-C OTG - UART Signed-off-by: Sean Nyekjaer Acked-by: Conor Dooley Acked-by: Krzysztof Kozlowski Signed-off-by: Alexandre Torgue --- Documentation/devicetree/bindings/arm/stm32/stm32.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml index 4bf28e717a56..df087c81c69e 100644 --- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml @@ -146,6 +146,7 @@ properties: - lxa,stm32mp157c-mc1 # Linux Automation MC-1 - lxa,stm32mp157c-tac-gen1 # Linux Automation TAC (Generation 1) - lxa,stm32mp157c-tac-gen2 # Linux Automation TAC (Generation 2) + - oct,stm32mp157c-osd32-red # Octavo OSD32MP1 RED board - const: oct,stm32mp15xx-osd32 - enum: - st,stm32mp157 From c848f884d1b4d858dff03269265a3300f542011c Mon Sep 17 00:00:00 2001 From: Sean Nyekjaer Date: Wed, 16 Aug 2023 14:24:29 +0200 Subject: [PATCH 09/20] ARM: dts: stm32: Add Octavo OSD32MP1-RED board Add support for the Octavo OSD32MP1-RED development board. General features: - STM32MP157C - 512MB DDR3 - CAN-FD - HDMI - USB-C OTG - UART Signed-off-by: Sean Nyekjaer Reviewed-by: Olivier Moysan Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/Makefile | 1 + .../boot/dts/st/stm32mp157c-osd32mp1-red.dts | 225 ++++++++++++++++++ 2 files changed, 226 insertions(+) create mode 100644 arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts diff --git a/arch/arm/boot/dts/st/Makefile b/arch/arm/boot/dts/st/Makefile index 44b264c399ec..7892ad69b441 100644 --- a/arch/arm/boot/dts/st/Makefile +++ b/arch/arm/boot/dts/st/Makefile @@ -59,6 +59,7 @@ dtb-$(CONFIG_ARCH_STM32) += \ stm32mp157c-lxa-tac-gen1.dtb \ stm32mp157c-lxa-tac-gen2.dtb \ stm32mp157c-odyssey.dtb \ + stm32mp157c-osd32mp1-red.dtb \ stm32mp157c-phycore-stm32mp1-3.dtb dtb-$(CONFIG_ARCH_U8500) += \ ste-snowball.dtb \ diff --git a/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts b/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts new file mode 100644 index 000000000000..bd67a1db9122 --- /dev/null +++ b/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts @@ -0,0 +1,225 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) Geanix ApS 2023 - All Rights Reserved + * Author: Sean Nyekjaer + */ + +/dts-v1/; + +#include "stm32mp157.dtsi" +#include "stm32mp15xc.dtsi" +#include "stm32mp15xx-osd32.dtsi" +#include "stm32mp15xxac-pinctrl.dtsi" + +#include +#include + +/ { + model = "Octavo OSD32MP1 RED board"; + compatible = "oct,stm32mp157c-osd32-red", "oct,stm32mp15xx-osd32", "st,stm32mp157"; + + aliases { + serial0 = &uart4; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + led-controller-0 { + compatible = "gpio-leds"; + + led-0 { + label = "heartbeat"; + gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; +}; + +&crc1 { + status = "okay"; +}; + +&dts { + status = "okay"; +}; + +ðernet0 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <ðernet0_rgmii_pins_a>; + pinctrl-1 = <ðernet0_rgmii_sleep_pins_a>; + phy-mode = "rgmii-id"; + max-speed = <1000>; + phy-handle = <&phy0>; + st,eth-clk-sel; + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy@3 { + reg = <3>; + }; + }; +}; + +&iwdg2 { + timeout-sec = <32>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c1_pins_a>; + pinctrl-1 = <&i2c1_sleep_pins_a>; + status = "okay"; + i2c-scl-rising-time-ns = <100>; + i2c-scl-falling-time-ns = <7>; + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + hdmi-transmitter@39 { + compatible = "sil,sii9022"; + reg = <0x39>; + reset-gpios = <&gpiog 0 GPIO_ACTIVE_LOW>; + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; + interrupt-parent = <&gpiog>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <<dc_pins_e>; + pinctrl-1 = <<dc_sleep_pins_e>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + sii9022_in: endpoint { + remote-endpoint = <<dc_ep0_out>; + }; + }; + + port@3 { + reg = <3>; + sii9022_tx_endpoint: endpoint { + remote-endpoint = <&i2s2_endpoint>; + }; + }; + }; + }; +}; + +&i2s2 { + clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc CK_PER>, <&rcc PLL3_R>; + clock-names = "pclk", "i2sclk", "x8k", "x11k"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2s2_pins_b>; + pinctrl-1 = <&i2s2_sleep_pins_b>; + status = "okay"; + + i2s2_port: port { + i2s2_endpoint: endpoint { + remote-endpoint = <&sii9022_tx_endpoint>; + dai-format = "i2s"; + mclk-fs = <256>; + }; + }; +}; + +<dc { + status = "okay"; + + port { + ltdc_ep0_out: endpoint { + remote-endpoint = <&sii9022_in>; + }; + }; +}; + +&m_can1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&m_can1_pins_d>; + pinctrl-1 = <&m_can1_sleep_pins_d>; + status = "okay"; +}; + +&pwr_regulators { + vdd-supply = <&vdd>; + vdd_3v3_usbfs-supply = <&vdd_usb>; +}; + +&rtc { + status = "okay"; +}; + +&sdmmc1 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc1_b4_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; + cd-gpios = <&gpioe 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + disable-wp; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&v3v3>; + status = "okay"; +}; + +&sdmmc2 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_d>; + pinctrl-1 = <&sdmmc2_b4_od_pins_a>; + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_d>; + non-removable; + no-sd; + no-sdio; + st,neg-edge; + bus-width = <8>; + vmmc-supply = <&v3v3>; + vqmmc-supply = <&vdd>; + mmc-ddr-3_3v; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&uart4_pins_a>; + pinctrl-1 = <&uart4_sleep_pins_a>; + pinctrl-2 = <&uart4_idle_pins_a>; + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; +}; + +&usbh_ehci { + phys = <&usbphyc_port0>; + phy-names = "usb"; + status = "okay"; +}; + +&usbh_ohci { + phys = <&usbphyc_port0>; + phy-names = "usb"; + status = "okay"; +}; + +&usbotg_hs { + vbus-supply = <&vbus_otg>; +}; + +&usbphyc { + status = "okay"; +}; + +&usbphyc_port0 { + phy-supply = <&vdd_usb>; +}; + +&usbphyc_port1 { + phy-supply = <&vdd_usb>; +}; From 873863dd13ffc58a8671d48798f1b2e6901dca59 Mon Sep 17 00:00:00 2001 From: Yann Gautier Date: Mon, 4 Sep 2023 15:22:10 +0200 Subject: [PATCH 10/20] arm64: dts: st: add sdmmc1 node in stm32mp251 SoC file The SDMMC1 peripheral is used for SD-cards (default on ST boards), or eMMC cards. For the moment it uses the fixed clock ck_flexgen_51, until clock driver is available. Signed-off-by: Yann Gautier Signed-off-by: Alexandre Torgue --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi index 5268a4321841..d7cb05d534ac 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -119,6 +119,19 @@ usart2: serial@400e0000 { clocks = <&ck_flexgen_08>; status = "disabled"; }; + + sdmmc1: mmc@48220000 { + compatible = "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00353180>; + reg = <0x48220000 0x400>, <0x44230400 0x8>; + interrupts = ; + clocks = <&ck_flexgen_51>; + clock-names = "apb_pclk"; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <120000000>; + status = "disabled"; + }; }; syscfg: syscon@44230000 { From 7db55ad3a64a46bfcdb6f902090f844654d60dfe Mon Sep 17 00:00:00 2001 From: Yann Gautier Date: Mon, 4 Sep 2023 15:22:11 +0200 Subject: [PATCH 11/20] arm64: dts: st: add sdmmc1 pins for stm32mp25 Add the pins used for SD-card on STM32MP257F-EV1 board. Signed-off-by: Yann Gautier Signed-off-by: Alexandre Torgue --- arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi index d34a1d5e79c0..66791a974f8f 100644 --- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi @@ -6,6 +6,60 @@ #include &pinctrl { + sdmmc1_b4_pins_a: sdmmc1-b4-0 { + pins1 { + pinmux = , /* SDMMC1_D0 */ + , /* SDMMC1_D1 */ + , /* SDMMC1_D2 */ + , /* SDMMC1_D3 */ + ; /* SDMMC1_CMD */ + slew-rate = <2>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = ; /* SDMMC1_CK */ + slew-rate = <3>; + drive-push-pull; + bias-disable; + }; + }; + + sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { + pins1 { + pinmux = , /* SDMMC1_D0 */ + , /* SDMMC1_D1 */ + , /* SDMMC1_D2 */ + ; /* SDMMC1_D3 */ + slew-rate = <2>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = ; /* SDMMC1_CK */ + slew-rate = <3>; + drive-push-pull; + bias-disable; + }; + pins3 { + pinmux = ; /* SDMMC1_CMD */ + slew-rate = <2>; + drive-open-drain; + bias-disable; + }; + }; + + sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { + pins { + pinmux = , /* SDMMC1_D0 */ + , /* SDMMC1_D1 */ + , /* SDMMC1_D2 */ + , /* SDMMC1_D3 */ + , /* SDMMC1_CK */ + ; /* SDMMC1_CMD */ + }; + }; + usart2_pins_a: usart2-0 { pins1 { pinmux = ; /* USART2_TX */ From 74649c9895037eae02ecbe1c5d49c09529664769 Mon Sep 17 00:00:00 2001 From: Yann Gautier Date: Mon, 4 Sep 2023 15:22:12 +0200 Subject: [PATCH 12/20] arm64: dts: st: add SD-card support on STM32MP257F-EV1 board Add the configuration node for SD-card support on STM32MP257F-EV1 board. For the moment it uses a fixed regulator for vmmc, and vqmmc is skipped until regulator driver is available. Signed-off-by: Yann Gautier Signed-off-by: Alexandre Torgue --- arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts index 39b4726cc098..6c3b83c2b48f 100644 --- a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts +++ b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts @@ -6,6 +6,7 @@ /dts-v1/; +#include #include "stm32mp257.dtsi" #include "stm32mp25xf.dtsi" #include "stm32mp25-pinctrl.dtsi" @@ -39,6 +40,27 @@ fw@80000000 { no-map; }; }; + + vdd_sdcard: vdd-sdcard { + compatible = "regulator-fixed"; + regulator-name = "vdd_sdcard"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; +}; + +&sdmmc1 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc1_b4_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; + cd-gpios = <&gpiod 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + disable-wp; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&vdd_sdcard>; + status = "okay"; }; &usart2 { From 89fca38168c9da9cb890ae4033af479c4cee1469 Mon Sep 17 00:00:00 2001 From: Alexandre Torgue Date: Thu, 21 Sep 2023 15:29:32 +0200 Subject: [PATCH 13/20] arm64: dts: st: add arm-wdt node for watchdog support on stm32mp251 Add the node to use the ARM SMC watchdog support. It will use a dedicated smc-id to configure and kick the watchdog. Signed-off-by: Lionel Debieve Signed-off-by: Alexandre Torgue --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi index d7cb05d534ac..124403f5f1f4 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -28,6 +28,12 @@ arm-pmu { interrupt-parent = <&intc>; }; + arm_wdt: watchdog { + compatible = "arm,smc-wdt"; + arm,smc-id = <0xb200005a>; + status = "disabled"; + }; + clocks { ck_flexgen_08: ck-flexgen-08 { #clock-cells = <0>; From 99b22552330b09f623f12f5dc2402175cbc18a15 Mon Sep 17 00:00:00 2001 From: Alexandre Torgue Date: Thu, 21 Sep 2023 15:30:05 +0200 Subject: [PATCH 14/20] arm64: dts: st: enable secure arm-wdt watchdog on stm32mp257f-ev1 Enable the watchdog and define the default timeout to 32 seconds. Signed-off-by: Lionel Debieve Signed-off-by: Alexandre Torgue --- arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts index 6c3b83c2b48f..b2d3afb15758 100644 --- a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts +++ b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts @@ -50,6 +50,11 @@ vdd_sdcard: vdd-sdcard { }; }; +&arm_wdt { + timeout-sec = <32>; + status = "okay"; +}; + &sdmmc1 { pinctrl-names = "default", "opendrain", "sleep"; pinctrl-0 = <&sdmmc1_b4_pins_a>; From 358d04ca9737f3ce90dda50a1f68a954032aadc9 Mon Sep 17 00:00:00 2001 From: Lionel Debieve Date: Wed, 16 Aug 2023 16:26:17 +0200 Subject: [PATCH 15/20] ARM: dts: stm32: add HASH on stm32mp131 Add the HASH support on stm32mp131. Signed-off-by: Lionel Debieve Signed-off-by: Thomas Bourgoin Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp131.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi index ac90fcbf0c09..a94ce3085466 100644 --- a/arch/arm/boot/dts/st/stm32mp131.dtsi +++ b/arch/arm/boot/dts/st/stm32mp131.dtsi @@ -1210,6 +1210,17 @@ timer { }; }; + hash: hash@54003000 { + compatible = "st,stm32mp13-hash"; + reg = <0x54003000 0x400>; + interrupts = ; + clocks = <&rcc HASH1>; + resets = <&rcc HASH1_R>; + dmas = <&mdma 30 0x2 0x1000a02 0x0 0x0>; + dma-names = "in"; + status = "disabled"; + }; + mdma: dma-controller@58000000 { compatible = "st,stm32h7-mdma"; reg = <0x58000000 0x1000>; From 88bb50edb61068c4416df2e55677fb3159f647f1 Mon Sep 17 00:00:00 2001 From: Dario Binacchi Date: Mon, 4 Sep 2023 20:03:41 +0200 Subject: [PATCH 16/20] ARM: dts: stm32: stm32f7-pinctrl: don't use multiple blank lines MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The patch fixes the following warning: arch/arm/dts/stm32f7-pinctrl.dtsi:380: check: Please don't use multiple blank lines Fixes: ba287d1a0137 ("ARM: dts: stm32: add pin map for LTDC on stm32f7") Signed-off-by: Dario Binacchi Reviewed-by: Raphaël Gallais-Pou Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi index 65480a9f5cc4..842f2b17c4a8 100644 --- a/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi @@ -376,7 +376,6 @@ pins2 { }; }; - ltdc_pins_a: ltdc-0 { pins { pinmux = , /* LCD_B0 */ From 565c88ae53c5d0acacb7644f337e786d08874b76 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 22 Sep 2023 12:00:21 +0200 Subject: [PATCH 17/20] ARM: dts: stm32: omit unused pinctrl groups from stm32mp15 dtb files stm32mp15-pinctrl.dtsi contains nearly all pinctrl groups collected from all boards. Most of them end up unused by a board and only waste binary space. Add /omit-if-no-ref/ to the groups to scrub the unused groups from the dtbs. Signed-off-by: Sascha Hauer Reviewed-by: Ahmad Fatoum Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi | 228 ++++++++++++++++++++ 1 file changed, 228 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi index 5af271e7f739..ae83e7b10232 100644 --- a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi @@ -6,6 +6,7 @@ #include &pinctrl { + /omit-if-no-ref/ adc1_ain_pins_a: adc1-ain-0 { pins { pinmux = , /* ADC1_INP2 */ @@ -17,12 +18,14 @@ pins { }; }; + /omit-if-no-ref/ adc1_in6_pins_a: adc1-in6-0 { pins { pinmux = ; }; }; + /omit-if-no-ref/ adc12_ain_pins_a: adc12-ain-0 { pins { pinmux = , /* ADC1 in13 */ @@ -32,6 +35,7 @@ pins { }; }; + /omit-if-no-ref/ adc12_ain_pins_b: adc12-ain-1 { pins { pinmux = , /* ADC1 in6 */ @@ -39,6 +43,7 @@ pins { }; }; + /omit-if-no-ref/ adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 { pins { pinmux = , /* ADC12 in18 */ @@ -46,6 +51,7 @@ pins { }; }; + /omit-if-no-ref/ cec_pins_a: cec-0 { pins { pinmux = ; @@ -55,12 +61,14 @@ pins { }; }; + /omit-if-no-ref/ cec_sleep_pins_a: cec-sleep-0 { pins { pinmux = ; /* HDMI_CEC */ }; }; + /omit-if-no-ref/ cec_pins_b: cec-1 { pins { pinmux = ; @@ -70,24 +78,28 @@ pins { }; }; + /omit-if-no-ref/ cec_sleep_pins_b: cec-sleep-1 { pins { pinmux = ; /* HDMI_CEC */ }; }; + /omit-if-no-ref/ dac_ch1_pins_a: dac-ch1-0 { pins { pinmux = ; }; }; + /omit-if-no-ref/ dac_ch2_pins_a: dac-ch2-0 { pins { pinmux = ; }; }; + /omit-if-no-ref/ dcmi_pins_a: dcmi-0 { pins { pinmux = ,/* DCMI_HSYNC */ @@ -109,6 +121,7 @@ pins { }; }; + /omit-if-no-ref/ dcmi_sleep_pins_a: dcmi-sleep-0 { pins { pinmux = ,/* DCMI_HSYNC */ @@ -129,6 +142,7 @@ pins { }; }; + /omit-if-no-ref/ dcmi_pins_b: dcmi-1 { pins { pinmux = ,/* DCMI_HSYNC */ @@ -146,6 +160,7 @@ pins { }; }; + /omit-if-no-ref/ dcmi_sleep_pins_b: dcmi-sleep-1 { pins { pinmux = ,/* DCMI_HSYNC */ @@ -162,6 +177,7 @@ pins { }; }; + /omit-if-no-ref/ dcmi_pins_c: dcmi-2 { pins { pinmux = ,/* DCMI_HSYNC */ @@ -181,6 +197,7 @@ pins { }; }; + /omit-if-no-ref/ dcmi_sleep_pins_c: dcmi-sleep-2 { pins { pinmux = ,/* DCMI_HSYNC */ @@ -199,6 +216,7 @@ pins { }; }; + /omit-if-no-ref/ ethernet0_rgmii_pins_a: rgmii-0 { pins1 { pinmux = , /* ETH_RGMII_CLK125 */ @@ -230,6 +248,7 @@ pins3 { }; }; + /omit-if-no-ref/ ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 { pins1 { pinmux = , /* ETH_RGMII_CLK125 */ @@ -250,6 +269,7 @@ pins1 { }; }; + /omit-if-no-ref/ ethernet0_rgmii_pins_b: rgmii-1 { pins1 { pinmux = , /* ETH_RGMII_CLK125 */ @@ -281,6 +301,7 @@ pins3 { }; }; + /omit-if-no-ref/ ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 { pins1 { pinmux = , /* ETH_RGMII_CLK125 */ @@ -301,6 +322,7 @@ pins1 { }; }; + /omit-if-no-ref/ ethernet0_rgmii_pins_c: rgmii-2 { pins1 { pinmux = , /* ETH_RGMII_CLK125 */ @@ -332,6 +354,7 @@ pins3 { }; }; + /omit-if-no-ref/ ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 { pins1 { pinmux = , /* ETH_RGMII_CLK125 */ @@ -352,6 +375,7 @@ pins1 { }; }; + /omit-if-no-ref/ ethernet0_rgmii_pins_d: rgmii-3 { pins1 { pinmux = , /* ETH_RGMII_CLK125 */ @@ -382,6 +406,7 @@ pins3 { }; }; + /omit-if-no-ref/ ethernet0_rgmii_sleep_pins_d: rgmii-sleep-3 { pins1 { pinmux = , /* ETH_RGMII_CLK125 */ @@ -402,6 +427,7 @@ pins1 { }; }; + /omit-if-no-ref/ ethernet0_rgmii_pins_e: rgmii-4 { pins1 { pinmux = , /* ETH_RGMII_GTX_CLK */ @@ -425,6 +451,7 @@ pins2 { }; }; + /omit-if-no-ref/ ethernet0_rgmii_sleep_pins_e: rgmii-sleep-4 { pins1 { pinmux = , /* ETH_RGMII_GTX_CLK */ @@ -442,6 +469,7 @@ pins1 { }; }; + /omit-if-no-ref/ ethernet0_rmii_pins_a: rmii-0 { pins1 { pinmux = , /* ETH1_RMII_TXD0 */ @@ -462,6 +490,7 @@ pins2 { }; }; + /omit-if-no-ref/ ethernet0_rmii_sleep_pins_a: rmii-sleep-0 { pins1 { pinmux = , /* ETH1_RMII_TXD0 */ @@ -476,6 +505,7 @@ pins1 { }; }; + /omit-if-no-ref/ ethernet0_rmii_pins_b: rmii-1 { pins1 { pinmux = , /* ETH1_CLK */ @@ -503,6 +533,7 @@ pins4 { }; }; + /omit-if-no-ref/ ethernet0_rmii_sleep_pins_b: rmii-sleep-1 { pins1 { pinmux = , /* ETH1_MDIO */ @@ -517,6 +548,7 @@ pins1 { }; }; + /omit-if-no-ref/ ethernet0_rmii_pins_c: rmii-2 { pins1 { pinmux = , /* ETH1_RMII_TXD0 */ @@ -537,6 +569,7 @@ pins2 { }; }; + /omit-if-no-ref/ ethernet0_rmii_sleep_pins_c: rmii-sleep-2 { pins1 { pinmux = , /* ETH1_RMII_TXD0 */ @@ -551,6 +584,7 @@ pins1 { }; }; + /omit-if-no-ref/ fmc_pins_a: fmc-0 { pins1 { pinmux = , /* FMC_NOE */ @@ -576,6 +610,7 @@ pins2 { }; }; + /omit-if-no-ref/ fmc_sleep_pins_a: fmc-sleep-0 { pins { pinmux = , /* FMC_NOE */ @@ -595,6 +630,7 @@ pins { }; }; + /omit-if-no-ref/ fmc_pins_b: fmc-1 { pins { pinmux = , /* FMC_NOE */ @@ -624,6 +660,7 @@ pins { }; }; + /omit-if-no-ref/ fmc_sleep_pins_b: fmc-sleep-1 { pins { pinmux = , /* FMC_NOE */ @@ -650,6 +687,7 @@ pins { }; }; + /omit-if-no-ref/ i2c1_pins_a: i2c1-0 { pins { pinmux = , /* I2C1_SCL */ @@ -660,6 +698,7 @@ pins { }; }; + /omit-if-no-ref/ i2c1_sleep_pins_a: i2c1-sleep-0 { pins { pinmux = , /* I2C1_SCL */ @@ -667,6 +706,7 @@ pins { }; }; + /omit-if-no-ref/ i2c1_pins_b: i2c1-1 { pins { pinmux = , /* I2C1_SCL */ @@ -677,6 +717,7 @@ pins { }; }; + /omit-if-no-ref/ i2c1_sleep_pins_b: i2c1-sleep-1 { pins { pinmux = , /* I2C1_SCL */ @@ -684,6 +725,7 @@ pins { }; }; + /omit-if-no-ref/ i2c2_pins_a: i2c2-0 { pins { pinmux = , /* I2C2_SCL */ @@ -694,6 +736,7 @@ pins { }; }; + /omit-if-no-ref/ i2c2_sleep_pins_a: i2c2-sleep-0 { pins { pinmux = , /* I2C2_SCL */ @@ -701,6 +744,7 @@ pins { }; }; + /omit-if-no-ref/ i2c2_pins_b1: i2c2-1 { pins { pinmux = ; /* I2C2_SDA */ @@ -710,12 +754,14 @@ pins { }; }; + /omit-if-no-ref/ i2c2_sleep_pins_b1: i2c2-sleep-1 { pins { pinmux = ; /* I2C2_SDA */ }; }; + /omit-if-no-ref/ i2c2_pins_c: i2c2-2 { pins { pinmux = , /* I2C2_SCL */ @@ -726,6 +772,7 @@ pins { }; }; + /omit-if-no-ref/ i2c2_pins_sleep_c: i2c2-sleep-2 { pins { pinmux = , /* I2C2_SCL */ @@ -733,6 +780,7 @@ pins { }; }; + /omit-if-no-ref/ i2c5_pins_a: i2c5-0 { pins { pinmux = , /* I2C5_SCL */ @@ -743,6 +791,7 @@ pins { }; }; + /omit-if-no-ref/ i2c5_sleep_pins_a: i2c5-sleep-0 { pins { pinmux = , /* I2C5_SCL */ @@ -751,6 +800,7 @@ pins { }; }; + /omit-if-no-ref/ i2c5_pins_b: i2c5-1 { pins { pinmux = , /* I2C5_SCL */ @@ -761,6 +811,7 @@ pins { }; }; + /omit-if-no-ref/ i2c5_sleep_pins_b: i2c5-sleep-1 { pins { pinmux = , /* I2C5_SCL */ @@ -768,6 +819,7 @@ pins { }; }; + /omit-if-no-ref/ i2s2_pins_a: i2s2-0 { pins { pinmux = , /* I2S2_SDO */ @@ -779,6 +831,7 @@ pins { }; }; + /omit-if-no-ref/ i2s2_sleep_pins_a: i2s2-sleep-0 { pins { pinmux = , /* I2S2_SDO */ @@ -787,6 +840,7 @@ pins { }; }; + /omit-if-no-ref/ i2s2_pins_b: i2s2-1 { pins { pinmux = , /* I2S2_SDO */ @@ -798,6 +852,7 @@ pins { }; }; + /omit-if-no-ref/ i2s2_sleep_pins_b: i2s2-sleep-1 { pins { pinmux = , /* I2S2_SDO */ @@ -806,6 +861,7 @@ pins { }; }; + /omit-if-no-ref/ ltdc_pins_a: ltdc-0 { pins { pinmux = , /* LCD_CLK */ @@ -842,6 +898,7 @@ pins { }; }; + /omit-if-no-ref/ ltdc_sleep_pins_a: ltdc-sleep-0 { pins { pinmux = , /* LCD_CLK */ @@ -875,6 +932,7 @@ pins { }; }; + /omit-if-no-ref/ ltdc_pins_b: ltdc-1 { pins { pinmux = , /* LCD_CLK */ @@ -911,6 +969,7 @@ pins { }; }; + /omit-if-no-ref/ ltdc_sleep_pins_b: ltdc-sleep-1 { pins { pinmux = , /* LCD_CLK */ @@ -944,6 +1003,7 @@ pins { }; }; + /omit-if-no-ref/ ltdc_pins_c: ltdc-2 { pins1 { pinmux = , /* LTDC_R6 */ @@ -979,6 +1039,7 @@ pins2 { }; }; + /omit-if-no-ref/ ltdc_sleep_pins_c: ltdc-sleep-2 { pins1 { pinmux = , /* LTDC_R6 */ @@ -1006,6 +1067,7 @@ pins1 { }; }; + /omit-if-no-ref/ ltdc_pins_d: ltdc-3 { pins1 { pinmux = ; /* LCD_CLK */ @@ -1047,6 +1109,7 @@ pins2 { }; }; + /omit-if-no-ref/ ltdc_sleep_pins_d: ltdc-sleep-3 { pins { pinmux = , /* LCD_CLK */ @@ -1080,6 +1143,7 @@ pins { }; }; + /omit-if-no-ref/ ltdc_pins_e: ltdc-4 { pins1 { pinmux = , /* LTDC_R0 */ @@ -1122,6 +1186,7 @@ pins2 { }; }; + /omit-if-no-ref/ ltdc_sleep_pins_e: ltdc-sleep-4 { pins { pinmux = , /* LTDC_R0 */ @@ -1155,6 +1220,7 @@ pins { }; }; + /omit-if-no-ref/ mco1_pins_a: mco1-0 { pins { pinmux = ; /* MCO1 */ @@ -1164,12 +1230,14 @@ pins { }; }; + /omit-if-no-ref/ mco1_sleep_pins_a: mco1-sleep-0 { pins { pinmux = ; /* MCO1 */ }; }; + /omit-if-no-ref/ mco2_pins_a: mco2-0 { pins { pinmux = ; /* MCO2 */ @@ -1179,12 +1247,14 @@ pins { }; }; + /omit-if-no-ref/ mco2_sleep_pins_a: mco2-sleep-0 { pins { pinmux = ; /* MCO2 */ }; }; + /omit-if-no-ref/ m_can1_pins_a: m-can1-0 { pins1 { pinmux = ; /* CAN1_TX */ @@ -1198,6 +1268,7 @@ pins2 { }; }; + /omit-if-no-ref/ m_can1_sleep_pins_a: m_can1-sleep-0 { pins { pinmux = , /* CAN1_TX */ @@ -1205,6 +1276,7 @@ pins { }; }; + /omit-if-no-ref/ m_can1_pins_b: m-can1-1 { pins1 { pinmux = ; /* CAN1_TX */ @@ -1218,6 +1290,7 @@ pins2 { }; }; + /omit-if-no-ref/ m_can1_sleep_pins_b: m_can1-sleep-1 { pins { pinmux = , /* CAN1_TX */ @@ -1225,6 +1298,7 @@ pins { }; }; + /omit-if-no-ref/ m_can1_pins_c: m-can1-2 { pins1 { pinmux = ; /* CAN1_TX */ @@ -1238,6 +1312,7 @@ pins2 { }; }; + /omit-if-no-ref/ m_can1_sleep_pins_c: m_can1-sleep-2 { pins { pinmux = , /* CAN1_TX */ @@ -1245,6 +1320,7 @@ pins { }; }; + /omit-if-no-ref/ m_can1_pins_d: m-can1-3 { pins1 { pinmux = ; /* CAN1_TX */ @@ -1258,6 +1334,7 @@ pins2 { }; }; + /omit-if-no-ref/ m_can1_sleep_pins_d: m_can1-sleep-3 { pins { pinmux = , /* CAN1_TX */ @@ -1265,6 +1342,7 @@ pins { }; }; + /omit-if-no-ref/ m_can2_pins_a: m-can2-0 { pins1 { pinmux = ; /* CAN2_TX */ @@ -1278,6 +1356,7 @@ pins2 { }; }; + /omit-if-no-ref/ m_can2_sleep_pins_a: m_can2-sleep-0 { pins { pinmux = , /* CAN2_TX */ @@ -1285,6 +1364,7 @@ pins { }; }; + /omit-if-no-ref/ pwm1_pins_a: pwm1-0 { pins { pinmux = , /* TIM1_CH1 */ @@ -1296,6 +1376,7 @@ pins { }; }; + /omit-if-no-ref/ pwm1_sleep_pins_a: pwm1-sleep-0 { pins { pinmux = , /* TIM1_CH1 */ @@ -1304,6 +1385,7 @@ pins { }; }; + /omit-if-no-ref/ pwm1_pins_b: pwm1-1 { pins { pinmux = ; /* TIM1_CH1 */ @@ -1313,12 +1395,14 @@ pins { }; }; + /omit-if-no-ref/ pwm1_sleep_pins_b: pwm1-sleep-1 { pins { pinmux = ; /* TIM1_CH1 */ }; }; + /omit-if-no-ref/ pwm1_pins_c: pwm1-2 { pins { pinmux = ; /* TIM1_CH2 */ @@ -1327,12 +1411,14 @@ pins { }; }; + /omit-if-no-ref/ pwm1_sleep_pins_c: pwm1-sleep-2 { pins { pinmux = ; /* TIM1_CH2 */ }; }; + /omit-if-no-ref/ pwm2_pins_a: pwm2-0 { pins { pinmux = ; /* TIM2_CH4 */ @@ -1342,12 +1428,14 @@ pins { }; }; + /omit-if-no-ref/ pwm2_sleep_pins_a: pwm2-sleep-0 { pins { pinmux = ; /* TIM2_CH4 */ }; }; + /omit-if-no-ref/ pwm3_pins_a: pwm3-0 { pins { pinmux = ; /* TIM3_CH2 */ @@ -1357,12 +1445,14 @@ pins { }; }; + /omit-if-no-ref/ pwm3_sleep_pins_a: pwm3-sleep-0 { pins { pinmux = ; /* TIM3_CH2 */ }; }; + /omit-if-no-ref/ pwm3_pins_b: pwm3-1 { pins { pinmux = ; /* TIM3_CH2 */ @@ -1372,12 +1462,14 @@ pins { }; }; + /omit-if-no-ref/ pwm3_sleep_pins_b: pwm3-sleep-1 { pins { pinmux = ; /* TIM3_CH2 */ }; }; + /omit-if-no-ref/ pwm4_pins_a: pwm4-0 { pins { pinmux = , /* TIM4_CH3 */ @@ -1388,6 +1480,7 @@ pins { }; }; + /omit-if-no-ref/ pwm4_sleep_pins_a: pwm4-sleep-0 { pins { pinmux = , /* TIM4_CH3 */ @@ -1395,6 +1488,7 @@ pins { }; }; + /omit-if-no-ref/ pwm4_pins_b: pwm4-1 { pins { pinmux = ; /* TIM4_CH2 */ @@ -1404,12 +1498,14 @@ pins { }; }; + /omit-if-no-ref/ pwm4_sleep_pins_b: pwm4-sleep-1 { pins { pinmux = ; /* TIM4_CH2 */ }; }; + /omit-if-no-ref/ pwm5_pins_a: pwm5-0 { pins { pinmux = ; /* TIM5_CH2 */ @@ -1419,12 +1515,14 @@ pins { }; }; + /omit-if-no-ref/ pwm5_sleep_pins_a: pwm5-sleep-0 { pins { pinmux = ; /* TIM5_CH2 */ }; }; + /omit-if-no-ref/ pwm5_pins_b: pwm5-1 { pins { pinmux = , /* TIM5_CH2 */ @@ -1436,6 +1534,7 @@ pins { }; }; + /omit-if-no-ref/ pwm5_sleep_pins_b: pwm5-sleep-1 { pins { pinmux = , /* TIM5_CH2 */ @@ -1444,6 +1543,7 @@ pins { }; }; + /omit-if-no-ref/ pwm8_pins_a: pwm8-0 { pins { pinmux = ; /* TIM8_CH4 */ @@ -1453,12 +1553,14 @@ pins { }; }; + /omit-if-no-ref/ pwm8_sleep_pins_a: pwm8-sleep-0 { pins { pinmux = ; /* TIM8_CH4 */ }; }; + /omit-if-no-ref/ pwm8_pins_b: pwm8-1 { pins { pinmux = , /* TIM8_CH1 */ @@ -1470,6 +1572,7 @@ pins { }; }; + /omit-if-no-ref/ pwm8_sleep_pins_b: pwm8-sleep-1 { pins { pinmux = , /* TIM8_CH1 */ @@ -1479,6 +1582,7 @@ pins { }; }; + /omit-if-no-ref/ pwm12_pins_a: pwm12-0 { pins { pinmux = ; /* TIM12_CH1 */ @@ -1488,12 +1592,14 @@ pins { }; }; + /omit-if-no-ref/ pwm12_sleep_pins_a: pwm12-sleep-0 { pins { pinmux = ; /* TIM12_CH1 */ }; }; + /omit-if-no-ref/ qspi_clk_pins_a: qspi-clk-0 { pins { pinmux = ; /* QSPI_CLK */ @@ -1503,12 +1609,14 @@ pins { }; }; + /omit-if-no-ref/ qspi_clk_sleep_pins_a: qspi-clk-sleep-0 { pins { pinmux = ; /* QSPI_CLK */ }; }; + /omit-if-no-ref/ qspi_bk1_pins_a: qspi-bk1-0 { pins { pinmux = , /* QSPI_BK1_IO0 */ @@ -1521,6 +1629,7 @@ pins { }; }; + /omit-if-no-ref/ qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 { pins { pinmux = , /* QSPI_BK1_IO0 */ @@ -1530,6 +1639,7 @@ pins { }; }; + /omit-if-no-ref/ qspi_bk2_pins_a: qspi-bk2-0 { pins { pinmux = , /* QSPI_BK2_IO0 */ @@ -1542,6 +1652,7 @@ pins { }; }; + /omit-if-no-ref/ qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 { pins { pinmux = , /* QSPI_BK2_IO0 */ @@ -1551,6 +1662,7 @@ pins { }; }; + /omit-if-no-ref/ qspi_cs1_pins_a: qspi-cs1-0 { pins { pinmux = ; /* QSPI_BK1_NCS */ @@ -1560,12 +1672,14 @@ pins { }; }; + /omit-if-no-ref/ qspi_cs1_sleep_pins_a: qspi-cs1-sleep-0 { pins { pinmux = ; /* QSPI_BK1_NCS */ }; }; + /omit-if-no-ref/ qspi_cs2_pins_a: qspi-cs2-0 { pins { pinmux = ; /* QSPI_BK2_NCS */ @@ -1575,12 +1689,14 @@ pins { }; }; + /omit-if-no-ref/ qspi_cs2_sleep_pins_a: qspi-cs2-sleep-0 { pins { pinmux = ; /* QSPI_BK2_NCS */ }; }; + /omit-if-no-ref/ sai2a_pins_a: sai2a-0 { pins { pinmux = , /* SAI2_SCK_A */ @@ -1593,6 +1709,7 @@ pins { }; }; + /omit-if-no-ref/ sai2a_sleep_pins_a: sai2a-sleep-0 { pins { pinmux = , /* SAI2_SCK_A */ @@ -1602,6 +1719,7 @@ pins { }; }; + /omit-if-no-ref/ sai2a_pins_b: sai2a-1 { pins1 { pinmux = , /* SAI2_SD_A */ @@ -1613,6 +1731,7 @@ pins1 { }; }; + /omit-if-no-ref/ sai2a_sleep_pins_b: sai2a-sleep-1 { pins { pinmux = , /* SAI2_SD_A */ @@ -1621,6 +1740,7 @@ pins { }; }; + /omit-if-no-ref/ sai2a_pins_c: sai2a-2 { pins { pinmux = , /* SAI2_SCK_A */ @@ -1632,6 +1752,7 @@ pins { }; }; + /omit-if-no-ref/ sai2a_sleep_pins_c: sai2a-sleep-2 { pins { pinmux = , /* SAI2_SCK_A */ @@ -1640,6 +1761,7 @@ pins { }; }; + /omit-if-no-ref/ sai2b_pins_a: sai2b-0 { pins1 { pinmux = , /* SAI2_SCK_B */ @@ -1655,6 +1777,7 @@ pins2 { }; }; + /omit-if-no-ref/ sai2b_sleep_pins_a: sai2b-sleep-0 { pins { pinmux = , /* SAI2_SD_B */ @@ -1664,6 +1787,7 @@ pins { }; }; + /omit-if-no-ref/ sai2b_pins_b: sai2b-1 { pins { pinmux = ; /* SAI2_SD_B */ @@ -1671,12 +1795,14 @@ pins { }; }; + /omit-if-no-ref/ sai2b_sleep_pins_b: sai2b-sleep-1 { pins { pinmux = ; /* SAI2_SD_B */ }; }; + /omit-if-no-ref/ sai2b_pins_c: sai2b-2 { pins1 { pinmux = ; /* SAI2_SD_B */ @@ -1684,12 +1810,14 @@ pins1 { }; }; + /omit-if-no-ref/ sai2b_sleep_pins_c: sai2b-sleep-2 { pins { pinmux = ; /* SAI2_SD_B */ }; }; + /omit-if-no-ref/ sai2b_pins_d: sai2b-3 { pins1 { pinmux = , /* SAI2_SCK_B */ @@ -1705,6 +1833,7 @@ pins2 { }; }; + /omit-if-no-ref/ sai2b_sleep_pins_d: sai2b-sleep-3 { pins1 { pinmux = , /* SAI2_SCK_B */ @@ -1714,6 +1843,7 @@ pins1 { }; }; + /omit-if-no-ref/ sai4a_pins_a: sai4a-0 { pins { pinmux = ; /* SAI4_SD_A */ @@ -1723,12 +1853,14 @@ pins { }; }; + /omit-if-no-ref/ sai4a_sleep_pins_a: sai4a-sleep-0 { pins { pinmux = ; /* SAI4_SD_A */ }; }; + /omit-if-no-ref/ sdmmc1_b4_pins_a: sdmmc1-b4-0 { pins1 { pinmux = , /* SDMMC1_D0 */ @@ -1748,6 +1880,7 @@ pins2 { }; }; + /omit-if-no-ref/ sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { pins1 { pinmux = , /* SDMMC1_D0 */ @@ -1772,6 +1905,7 @@ pins3 { }; }; + /omit-if-no-ref/ sdmmc1_b4_init_pins_a: sdmmc1-b4-init-0 { pins1 { pinmux = , /* SDMMC1_D0 */ @@ -1784,6 +1918,7 @@ pins1 { }; }; + /omit-if-no-ref/ sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { pins { pinmux = , /* SDMMC1_D0 */ @@ -1795,6 +1930,7 @@ pins { }; }; + /omit-if-no-ref/ sdmmc1_b4_pins_b: sdmmc1-b4-1 { pins1 { pinmux = , /* SDMMC1_D0 */ @@ -1814,6 +1950,7 @@ pins2 { }; }; + /omit-if-no-ref/ sdmmc1_b4_od_pins_b: sdmmc1-b4-od-1 { pins1 { pinmux = , /* SDMMC1_D0 */ @@ -1838,6 +1975,7 @@ pins3 { }; }; + /omit-if-no-ref/ sdmmc1_b4_sleep_pins_b: sdmmc1-b4-sleep-1 { pins { pinmux = , /* SDMMC1_D0 */ @@ -1849,6 +1987,7 @@ pins { }; }; + /omit-if-no-ref/ sdmmc1_dir_pins_a: sdmmc1-dir-0 { pins1 { pinmux = , /* SDMMC1_D0DIR */ @@ -1864,6 +2003,7 @@ pins2 { }; }; + /omit-if-no-ref/ sdmmc1_dir_init_pins_a: sdmmc1-dir-init-0 { pins1 { pinmux = , /* SDMMC1_D0DIR */ @@ -1875,6 +2015,7 @@ pins1 { }; }; + /omit-if-no-ref/ sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 { pins { pinmux = , /* SDMMC1_D0DIR */ @@ -1884,6 +2025,7 @@ pins { }; }; + /omit-if-no-ref/ sdmmc1_dir_pins_b: sdmmc1-dir-1 { pins1 { pinmux = , /* SDMMC1_D0DIR */ @@ -1899,6 +2041,7 @@ pins2 { }; }; + /omit-if-no-ref/ sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 { pins { pinmux = , /* SDMMC1_D0DIR */ @@ -1908,6 +2051,7 @@ pins { }; }; + /omit-if-no-ref/ sdmmc2_b4_pins_a: sdmmc2-b4-0 { pins1 { pinmux = , /* SDMMC2_D0 */ @@ -1927,6 +2071,7 @@ pins2 { }; }; + /omit-if-no-ref/ sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { pins1 { pinmux = , /* SDMMC2_D0 */ @@ -1951,6 +2096,7 @@ pins3 { }; }; + /omit-if-no-ref/ sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 { pins { pinmux = , /* SDMMC2_D0 */ @@ -1962,6 +2108,7 @@ pins { }; }; + /omit-if-no-ref/ sdmmc2_b4_pins_b: sdmmc2-b4-1 { pins1 { pinmux = , /* SDMMC2_D0 */ @@ -1981,6 +2128,7 @@ pins2 { }; }; + /omit-if-no-ref/ sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 { pins1 { pinmux = , /* SDMMC2_D0 */ @@ -2005,6 +2153,7 @@ pins3 { }; }; + /omit-if-no-ref/ sdmmc2_d47_pins_a: sdmmc2-d47-0 { pins { pinmux = , /* SDMMC2_D4 */ @@ -2017,6 +2166,7 @@ pins { }; }; + /omit-if-no-ref/ sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 { pins { pinmux = , /* SDMMC2_D4 */ @@ -2026,6 +2176,7 @@ pins { }; }; + /omit-if-no-ref/ sdmmc2_d47_pins_b: sdmmc2-d47-1 { pins { pinmux = , /* SDMMC2_D4 */ @@ -2038,6 +2189,7 @@ pins { }; }; + /omit-if-no-ref/ sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 { pins { pinmux = , /* SDMMC2_D4 */ @@ -2047,6 +2199,7 @@ pins { }; }; + /omit-if-no-ref/ sdmmc2_d47_pins_c: sdmmc2-d47-2 { pins { pinmux = , /* SDMMC2_D4 */ @@ -2059,6 +2212,7 @@ pins { }; }; + /omit-if-no-ref/ sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 { pins { pinmux = , /* SDMMC2_D4 */ @@ -2068,6 +2222,7 @@ pins { }; }; + /omit-if-no-ref/ sdmmc2_d47_pins_d: sdmmc2-d47-3 { pins { pinmux = , /* SDMMC2_D4 */ @@ -2077,6 +2232,7 @@ pins { }; }; + /omit-if-no-ref/ sdmmc2_d47_sleep_pins_d: sdmmc2-d47-sleep-3 { pins { pinmux = , /* SDMMC2_D4 */ @@ -2086,6 +2242,7 @@ pins { }; }; + /omit-if-no-ref/ sdmmc2_d47_pins_e: sdmmc2-d47-4 { pins { pinmux = , /* SDMMC2_D4 */ @@ -2098,6 +2255,7 @@ pins { }; }; + /omit-if-no-ref/ sdmmc2_d47_sleep_pins_e: sdmmc2-d47-sleep-4 { pins { pinmux = , /* SDMMC2_D4 */ @@ -2107,6 +2265,7 @@ pins { }; }; + /omit-if-no-ref/ sdmmc3_b4_pins_a: sdmmc3-b4-0 { pins1 { pinmux = , /* SDMMC3_D0 */ @@ -2126,6 +2285,7 @@ pins2 { }; }; + /omit-if-no-ref/ sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 { pins1 { pinmux = , /* SDMMC3_D0 */ @@ -2150,6 +2310,7 @@ pins3 { }; }; + /omit-if-no-ref/ sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sleep-0 { pins { pinmux = , /* SDMMC3_D0 */ @@ -2161,6 +2322,7 @@ pins { }; }; + /omit-if-no-ref/ sdmmc3_b4_pins_b: sdmmc3-b4-1 { pins1 { pinmux = , /* SDMMC3_D0 */ @@ -2180,6 +2342,7 @@ pins2 { }; }; + /omit-if-no-ref/ sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 { pins1 { pinmux = , /* SDMMC3_D0 */ @@ -2204,6 +2367,7 @@ pins3 { }; }; + /omit-if-no-ref/ sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 { pins { pinmux = , /* SDMMC3_D0 */ @@ -2215,6 +2379,7 @@ pins { }; }; + /omit-if-no-ref/ spdifrx_pins_a: spdifrx-0 { pins { pinmux = ; /* SPDIF_IN1 */ @@ -2222,12 +2387,14 @@ pins { }; }; + /omit-if-no-ref/ spdifrx_sleep_pins_a: spdifrx-sleep-0 { pins { pinmux = ; /* SPDIF_IN1 */ }; }; + /omit-if-no-ref/ spi1_pins_b: spi1-1 { pins1 { pinmux = , /* SPI1_SCK */ @@ -2243,6 +2410,7 @@ pins2 { }; }; + /omit-if-no-ref/ spi2_pins_a: spi2-0 { pins1 { pinmux = , /* SPI2_SCK */ @@ -2258,6 +2426,7 @@ pins2 { }; }; + /omit-if-no-ref/ spi2_pins_b: spi2-1 { pins1 { pinmux = , /* SPI2_SCK */ @@ -2273,6 +2442,7 @@ pins2 { }; }; + /omit-if-no-ref/ spi2_pins_c: spi2-2 { pins1 { pinmux = , /* SPI2_SCK */ @@ -2287,6 +2457,7 @@ pins2 { }; }; + /omit-if-no-ref/ spi4_pins_a: spi4-0 { pins { pinmux = , /* SPI4_SCK */ @@ -2301,6 +2472,7 @@ pins2 { }; }; + /omit-if-no-ref/ spi5_pins_a: spi5-0 { pins1 { pinmux = , /* SPI5_SCK */ @@ -2316,6 +2488,7 @@ pins2 { }; }; + /omit-if-no-ref/ stusb1600_pins_a: stusb1600-0 { pins { pinmux = ; @@ -2323,6 +2496,7 @@ pins { }; }; + /omit-if-no-ref/ uart4_pins_a: uart4-0 { pins1 { pinmux = ; /* UART4_TX */ @@ -2336,6 +2510,7 @@ pins2 { }; }; + /omit-if-no-ref/ uart4_idle_pins_a: uart4-idle-0 { pins1 { pinmux = ; /* UART4_TX */ @@ -2346,6 +2521,7 @@ pins2 { }; }; + /omit-if-no-ref/ uart4_sleep_pins_a: uart4-sleep-0 { pins { pinmux = , /* UART4_TX */ @@ -2353,6 +2529,7 @@ pins { }; }; + /omit-if-no-ref/ uart4_pins_b: uart4-1 { pins1 { pinmux = ; /* UART4_TX */ @@ -2366,6 +2543,7 @@ pins2 { }; }; + /omit-if-no-ref/ uart4_pins_c: uart4-2 { pins1 { pinmux = ; /* UART4_TX */ @@ -2379,6 +2557,7 @@ pins2 { }; }; + /omit-if-no-ref/ uart4_pins_d: uart4-3 { pins1 { pinmux = ; /* UART4_TX */ @@ -2392,6 +2571,7 @@ pins2 { }; }; + /omit-if-no-ref/ uart4_idle_pins_d: uart4-idle-3 { pins1 { pinmux = ; /* UART4_TX */ @@ -2402,6 +2582,7 @@ pins2 { }; }; + /omit-if-no-ref/ uart4_sleep_pins_d: uart4-sleep-3 { pins { pinmux = , /* UART4_TX */ @@ -2409,6 +2590,7 @@ pins { }; }; + /omit-if-no-ref/ uart5_pins_a: uart5-0 { pins1 { pinmux = ; /* UART5_TX */ @@ -2422,6 +2604,7 @@ pins2 { }; }; + /omit-if-no-ref/ uart7_pins_a: uart7-0 { pins1 { pinmux = ; /* UART7_TX */ @@ -2437,6 +2620,7 @@ pins2 { }; }; + /omit-if-no-ref/ uart7_pins_b: uart7-1 { pins1 { pinmux = ; /* UART7_TX */ @@ -2450,6 +2634,7 @@ pins2 { }; }; + /omit-if-no-ref/ uart7_pins_c: uart7-2 { pins1 { pinmux = ; /* UART7_TX */ @@ -2463,6 +2648,7 @@ pins2 { }; }; + /omit-if-no-ref/ uart7_idle_pins_c: uart7-idle-2 { pins1 { pinmux = ; /* UART7_TX */ @@ -2473,6 +2659,7 @@ pins2 { }; }; + /omit-if-no-ref/ uart7_sleep_pins_c: uart7-sleep-2 { pins { pinmux = , /* UART7_TX */ @@ -2480,6 +2667,7 @@ pins { }; }; + /omit-if-no-ref/ uart8_pins_a: uart8-0 { pins1 { pinmux = ; /* UART8_TX */ @@ -2493,6 +2681,7 @@ pins2 { }; }; + /omit-if-no-ref/ uart8_rtscts_pins_a: uart8rtscts-0 { pins { pinmux = , /* UART8_RTS */ @@ -2501,6 +2690,7 @@ pins { }; }; + /omit-if-no-ref/ usart1_pins_a: usart1-0 { pins1 { pinmux = ; /* USART1_RTS */ @@ -2514,6 +2704,7 @@ pins2 { }; }; + /omit-if-no-ref/ usart1_idle_pins_a: usart1-idle-0 { pins1 { pinmux = , /* USART1_RTS */ @@ -2521,6 +2712,7 @@ pins1 { }; }; + /omit-if-no-ref/ usart1_sleep_pins_a: usart1-sleep-0 { pins { pinmux = , /* USART1_RTS */ @@ -2528,6 +2720,7 @@ pins { }; }; + /omit-if-no-ref/ usart2_pins_a: usart2-0 { pins1 { pinmux = , /* USART2_TX */ @@ -2543,6 +2736,7 @@ pins2 { }; }; + /omit-if-no-ref/ usart2_sleep_pins_a: usart2-sleep-0 { pins { pinmux = , /* USART2_TX */ @@ -2552,6 +2746,7 @@ pins { }; }; + /omit-if-no-ref/ usart2_pins_b: usart2-1 { pins1 { pinmux = , /* USART2_TX */ @@ -2567,6 +2762,7 @@ pins2 { }; }; + /omit-if-no-ref/ usart2_sleep_pins_b: usart2-sleep-1 { pins { pinmux = , /* USART2_TX */ @@ -2576,6 +2772,7 @@ pins { }; }; + /omit-if-no-ref/ usart2_pins_c: usart2-2 { pins1 { pinmux = , /* USART2_TX */ @@ -2591,6 +2788,7 @@ pins2 { }; }; + /omit-if-no-ref/ usart2_idle_pins_c: usart2-idle-2 { pins1 { pinmux = , /* USART2_TX */ @@ -2608,6 +2806,7 @@ pins3 { }; }; + /omit-if-no-ref/ usart2_sleep_pins_c: usart2-sleep-2 { pins { pinmux = , /* USART2_TX */ @@ -2617,6 +2816,7 @@ pins { }; }; + /omit-if-no-ref/ usart3_pins_a: usart3-0 { pins1 { pinmux = ; /* USART3_TX */ @@ -2630,6 +2830,7 @@ pins2 { }; }; + /omit-if-no-ref/ usart3_idle_pins_a: usart3-idle-0 { pins1 { pinmux = ; /* USART3_TX */ @@ -2640,6 +2841,7 @@ pins2 { }; }; + /omit-if-no-ref/ usart3_sleep_pins_a: usart3-sleep-0 { pins { pinmux = , /* USART3_TX */ @@ -2647,6 +2849,7 @@ pins { }; }; + /omit-if-no-ref/ usart3_pins_b: usart3-1 { pins1 { pinmux = , /* USART3_TX */ @@ -2662,6 +2865,7 @@ pins2 { }; }; + /omit-if-no-ref/ usart3_idle_pins_b: usart3-idle-1 { pins1 { pinmux = , /* USART3_TX */ @@ -2679,6 +2883,7 @@ pins3 { }; }; + /omit-if-no-ref/ usart3_sleep_pins_b: usart3-sleep-1 { pins { pinmux = , /* USART3_TX */ @@ -2688,6 +2893,7 @@ pins { }; }; + /omit-if-no-ref/ usart3_pins_c: usart3-2 { pins1 { pinmux = , /* USART3_TX */ @@ -2703,6 +2909,7 @@ pins2 { }; }; + /omit-if-no-ref/ usart3_idle_pins_c: usart3-idle-2 { pins1 { pinmux = , /* USART3_TX */ @@ -2720,6 +2927,7 @@ pins3 { }; }; + /omit-if-no-ref/ usart3_sleep_pins_c: usart3-sleep-2 { pins { pinmux = , /* USART3_TX */ @@ -2729,6 +2937,7 @@ pins { }; }; + /omit-if-no-ref/ usart3_pins_d: usart3-3 { pins1 { pinmux = , /* USART3_TX */ @@ -2744,6 +2953,7 @@ pins2 { }; }; + /omit-if-no-ref/ usart3_idle_pins_d: usart3-idle-3 { pins1 { pinmux = , /* USART3_TX */ @@ -2756,6 +2966,7 @@ pins2 { }; }; + /omit-if-no-ref/ usart3_sleep_pins_d: usart3-sleep-3 { pins { pinmux = , /* USART3_TX */ @@ -2765,6 +2976,7 @@ pins { }; }; + /omit-if-no-ref/ usart3_pins_e: usart3-4 { pins1 { pinmux = , /* USART3_TX */ @@ -2780,6 +2992,7 @@ pins2 { }; }; + /omit-if-no-ref/ usart3_idle_pins_e: usart3-idle-4 { pins1 { pinmux = , /* USART3_TX */ @@ -2797,6 +3010,7 @@ pins3 { }; }; + /omit-if-no-ref/ usart3_sleep_pins_e: usart3-sleep-4 { pins { pinmux = , /* USART3_TX */ @@ -2806,6 +3020,7 @@ pins { }; }; + /omit-if-no-ref/ usart3_pins_f: usart3-5 { pins1 { pinmux = , /* USART3_TX */ @@ -2821,12 +3036,14 @@ pins2 { }; }; + /omit-if-no-ref/ usbotg_hs_pins_a: usbotg-hs-0 { pins { pinmux = ; /* OTG_ID */ }; }; + /omit-if-no-ref/ usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 { pins { pinmux = , /* OTG_FS_DM */ @@ -2836,6 +3053,7 @@ pins { }; &pinctrl_z { + /omit-if-no-ref/ i2c2_pins_b2: i2c2-0 { pins { pinmux = ; /* I2C2_SCL */ @@ -2845,12 +3063,14 @@ pins { }; }; + /omit-if-no-ref/ i2c2_sleep_pins_b2: i2c2-sleep-0 { pins { pinmux = ; /* I2C2_SCL */ }; }; + /omit-if-no-ref/ i2c4_pins_a: i2c4-0 { pins { pinmux = , /* I2C4_SCL */ @@ -2861,6 +3081,7 @@ pins { }; }; + /omit-if-no-ref/ i2c4_sleep_pins_a: i2c4-sleep-0 { pins { pinmux = , /* I2C4_SCL */ @@ -2868,6 +3089,7 @@ pins { }; }; + /omit-if-no-ref/ i2c6_pins_a: i2c6-0 { pins { pinmux = , /* I2C6_SCL */ @@ -2878,6 +3100,7 @@ pins { }; }; + /omit-if-no-ref/ i2c6_sleep_pins_a: i2c6-sleep-0 { pins { pinmux = , /* I2C6_SCL */ @@ -2885,6 +3108,7 @@ pins { }; }; + /omit-if-no-ref/ spi1_pins_a: spi1-0 { pins1 { pinmux = , /* SPI1_SCK */ @@ -2900,6 +3124,7 @@ pins2 { }; }; + /omit-if-no-ref/ spi1_sleep_pins_a: spi1-sleep-0 { pins { pinmux = , /* SPI1_SCK */ @@ -2908,6 +3133,7 @@ pins { }; }; + /omit-if-no-ref/ usart1_pins_b: usart1-1 { pins1 { pinmux = ; /* USART1_TX */ @@ -2921,6 +3147,7 @@ pins2 { }; }; + /omit-if-no-ref/ usart1_idle_pins_b: usart1-idle-1 { pins1 { pinmux = ; /* USART1_TX */ @@ -2931,6 +3158,7 @@ pins2 { }; }; + /omit-if-no-ref/ usart1_sleep_pins_b: usart1-sleep-1 { pins { pinmux = , /* USART1_TX */ From efd00dc04f0310622e54534b71c522f2ca7db07e Mon Sep 17 00:00:00 2001 From: Gatien Chevallier Date: Thu, 21 Sep 2023 10:03:01 +0200 Subject: [PATCH 18/20] ARM: dts: stm32: add RNG node for STM32MP13x platforms The RNG on STM32MP13 offers upgrades like customization of its configuration and the conditional reset. The hardware RNG should be managed in the secure world for but it is supported on Linux. Therefore, is it not default enabled. Signed-off-by: Gatien Chevallier Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp131.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi index a94ce3085466..b04d24c939c3 100644 --- a/arch/arm/boot/dts/st/stm32mp131.dtsi +++ b/arch/arm/boot/dts/st/stm32mp131.dtsi @@ -1221,6 +1221,14 @@ hash: hash@54003000 { status = "disabled"; }; + rng: rng@54004000 { + compatible = "st,stm32mp13-rng"; + reg = <0x54004000 0x400>; + clocks = <&rcc RNG1_K>; + resets = <&rcc RNG1_R>; + status = "disabled"; + }; + mdma: dma-controller@58000000 { compatible = "st,stm32h7-mdma"; reg = <0x58000000 0x1000>; From 8fa7f119cc2a0b1f38f2ebed225969ffa217581e Mon Sep 17 00:00:00 2001 From: Ben Wolsieffer Date: Mon, 2 Oct 2023 13:13:38 -0400 Subject: [PATCH 19/20] ARM: dts: stm32: add stm32f7 SDIO sleep pins Add SDIO sleep pin definitions that place the pins in analog mode to save power. Signed-off-by: Ben Wolsieffer Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi index 842f2b17c4a8..97fc3fb5a9ca 100644 --- a/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32f7-pinctrl.dtsi @@ -263,6 +263,17 @@ pins2 { }; }; + sdio_pins_sleep_a: sdio-pins-sleep-a-0 { + pins { + pinmux = , /* SDMMC1 D0 */ + , /* SDMMC1 D1 */ + , /* SDMMC1 D2 */ + , /* SDMMC1 D3 */ + , /* SDMMC1 CLK */ + ; /* SDMMC1 CMD */ + }; + }; + sdio_pins_b: sdio-pins-b-0 { pins { pinmux = , /* SDMMC2 D0 */ @@ -294,6 +305,17 @@ pins2 { }; }; + sdio_pins_sleep_b: sdio-pins-sleep-b-0 { + pins { + pinmux = , /* SDMMC2 D0 */ + , /* SDMMC2 D1 */ + , /* SDMMC2 D2 */ + , /* SDMMC2 D3 */ + , /* SDMMC2 CLK */ + ; /* SDMMC2 CMD */ + }; + }; + can1_pins_a: can1-0 { pins1 { pinmux = ; /* CAN1_TX */ From 1aeb02d3f2c5a7a9f132ea748877012a48036d90 Mon Sep 17 00:00:00 2001 From: Ben Wolsieffer Date: Mon, 2 Oct 2023 13:13:39 -0400 Subject: [PATCH 20/20] ARM: dts: stm32: add SDIO pinctrl sleep support on stm32f7 boards Use the new analog mode SDIO pin definitions on the STM32F7 boards. Signed-off-by: Ben Wolsieffer Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32746g-eval.dts | 3 ++- arch/arm/boot/dts/st/stm32f746-disco.dts | 3 ++- arch/arm/boot/dts/st/stm32f769-disco.dts | 3 ++- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/st/stm32746g-eval.dts b/arch/arm/boot/dts/st/stm32746g-eval.dts index a293e65141c6..e9ac37b6eca0 100644 --- a/arch/arm/boot/dts/st/stm32746g-eval.dts +++ b/arch/arm/boot/dts/st/stm32746g-eval.dts @@ -188,9 +188,10 @@ &sdio1 { status = "okay"; vmmc-supply = <&mmc_vcard>; broken-cd; - pinctrl-names = "default", "opendrain"; + pinctrl-names = "default", "opendrain", "sleep"; pinctrl-0 = <&sdio_pins_a>; pinctrl-1 = <&sdio_pins_od_a>; + pinctrl-2 = <&sdio_pins_sleep_a>; bus-width = <4>; }; diff --git a/arch/arm/boot/dts/st/stm32f746-disco.dts b/arch/arm/boot/dts/st/stm32f746-disco.dts index 37e3a905fc3c..087de6f09629 100644 --- a/arch/arm/boot/dts/st/stm32f746-disco.dts +++ b/arch/arm/boot/dts/st/stm32f746-disco.dts @@ -164,9 +164,10 @@ &sdio1 { status = "okay"; vmmc-supply = <&vcc_3v3>; cd-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>; - pinctrl-names = "default", "opendrain"; + pinctrl-names = "default", "opendrain", "sleep"; pinctrl-0 = <&sdio_pins_a>; pinctrl-1 = <&sdio_pins_od_a>; + pinctrl-2 = <&sdio_pins_sleep_a>; bus-width = <4>; }; diff --git a/arch/arm/boot/dts/st/stm32f769-disco.dts b/arch/arm/boot/dts/st/stm32f769-disco.dts index b038d0ed39e8..5d12ae25b327 100644 --- a/arch/arm/boot/dts/st/stm32f769-disco.dts +++ b/arch/arm/boot/dts/st/stm32f769-disco.dts @@ -131,9 +131,10 @@ &sdio2 { vmmc-supply = <&mmc_vcard>; cd-gpios = <&gpioi 15 GPIO_ACTIVE_LOW>; broken-cd; - pinctrl-names = "default", "opendrain"; + pinctrl-names = "default", "opendrain", "sleep"; pinctrl-0 = <&sdio_pins_b>; pinctrl-1 = <&sdio_pins_od_b>; + pinctrl-2 = <&sdio_pins_sleep_b>; bus-width = <4>; };