soc bcm: brcmstb: Add support for S2/S3/S5 suspend states (MIPS)

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This commit adds support for the Broadcom STB S2/S3/S5 suspend
states on MIPS based SoCs.

This requires quite a lot of code in order to deal with the
different HW blocks that need to be quiesced during suspend:

- DDR PHY
- DDR memory controller and arbiter
- control processor

The final steps of the suspend execute in cache and there is is a little
bit of assembly code in order to shut down the DDR PHY PLL and then go
into a wait loop until a wake-up even occurs. Conversely the resume part
involves waiting for the DDR PHY PLL to come back up and resume
executions where we left.

Signed-off-by: Justin Chen <justinpopo6@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

...

This commit is contained in:

Justin Chen 2017-06-15 15:20:31 -07:00 • committed by Florian Fainelli

parent dedcf233ce

commit 0e9b114132

6 changed files with 821 additions and 2 deletions

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2

drivers/soc/bcm/brcmstb/Kconfig

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1

drivers/soc/bcm/brcmstb/pm/Makefile

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461

drivers/soc/bcm/brcmstb/pm/pm-mips.c

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13

drivers/soc/bcm/brcmstb/pm/pm.h

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200

drivers/soc/bcm/brcmstb/pm/s2-mips.S

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146

drivers/soc/bcm/brcmstb/pm/s3-mips.S

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