powerpc/32: Avoid risk of unrecoverable TLBmiss inside entry_32.S

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By default, the 8xx pins an ITLB on the first 8M of memory in order
to avoid any ITLB miss on kernel code.
However, with some debug functions like DEBUG_PAGEALLOC and
DEBUG_RODATA, pinning TLBs is contradictory.

In order to avoid any ITLB miss in a critical section without pinning
TLBs, we have to ensure that there is no page boundary crossed between
the setup of a new value in SRR0/SRR1 and the associated RFI.

The functions modifying srr0/srr1 are all located in setup_32.S.
They are spread over almost 4kbytes.

The patch forces a 12 bits (4kbytes) alignment for those
functions. This garanties that the functions remain in a
single 4k page.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

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Christophe Leroy 2017-07-12 12:08:49 +02:00 • committed by Michael Ellerman

parent c8a127092e

commit 0eb0d2e77d

1 changed files with 7 additions and 0 deletions

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arch/powerpc/kernel/entry_32.S

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