iommu/vt-d: Decouple PASID & PRI enabling from SVA

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Previously the PCI PASID and PRI capabilities are enabled in the path of
iommu device probe only if INTEL_IOMMU_SVM is configured and the device
supports ATS. As we've already decoupled the I/O page fault handler from
SVA, we could also decouple PASID and PRI enabling from it to make room
for growth of new features like kernel DMA with PASID, SIOV and nested
translation.

At the same time, the iommu_enable_dev_iotlb() helper is also called in
iommu_dev_enable_feature(dev, IOMMU_DEV_FEAT_SVA) path. It's unnecessary
and duplicate. This cleanups this helper to make the code neat.

Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Link: https://lore.kernel.org/r/20220915085814.2261409-1-baolu.lu@linux.intel.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>

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Lu Baolu 2022-09-26 21:15:25 +08:00 • committed by Joerg Roedel

parent 06f4b8d09d

commit 0faa19a151

3 changed files with 18 additions and 66 deletions

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5

drivers/iommu/intel/Kconfig

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78

drivers/iommu/intel/iommu.c

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1

drivers/iommu/intel/iommu.h

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