ARM: SMP enable of cache maintanence broadcast

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Masahiro Yamada reports that we can fail to set the FW bit in the
auxiliary control register, which enables broadcasting the cache
maintanence operations.  This occurs because we only check that the
SMP/nAMP bit is set, rather than checking whether all the bits we
want to be set are set.

Rearrange the code to ensure that all desired bits are set, and only
update the register if we discover some required bits are not set.

Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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Russell King 2016-03-29 11:08:22 +01:00

parent f55532a0c0

commit 0fc03d4c87

1 changed files with 5 additions and 5 deletions

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arch/arm/mm/proc-v7.S

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