ARM: dts: socfpga: fix register entry for timer3 on Arria10

Fixes the register address for the timer3 entry on Arria10.

Fixes: 475dc86d08 ("arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC")
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
This commit is contained in:
Dinh Nguyen 2020-07-31 10:26:40 -05:00
commit 0ff5a4812b