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drm/amdgpu: ensure no_hw_access is visible before MMIO
commit31b153315bupstream. Add a full memory barrier after clearing no_hw_access in amdgpu_device_mode1_reset() so subsequent PCI state restore access cannot observe stale state on other CPUs. Fixes:7edb503fe4("drm/amd/pm: Disable MMIO access during SMU Mode 1 reset") Signed-off-by: Perry Yuan <perry.yuan@amd.com> Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Simon Liebold <simonlie@amazon.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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