clk: qcom: dispcc-sdm845: Adjust internal GDSC wait times

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SDM845 downstream uses non-default values for GDSC internal waits.
Program them accordingly to avoid surprises.

Fixes: 81351776c9 ("clk: qcom: Add display clock controller driver for SDM845")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Caleb Connolly <caleb.connolly@linaro.org> # OnePlus 6
Link: https://lore.kernel.org/r/20240103-topic-845gdsc-v1-1-368efbe1a61d@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

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Konrad Dybcio 2024-01-03 21:20:18 +01:00 • committed by Bjorn Andersson

parent 6624b25c20

commit 117e7dc697

1 changed files with 2 additions and 0 deletions

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drivers/clk/qcom/dispcc-sdm845.c

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