riscv: dts: spacemit: add UART pinctrl combinations

Browse source

Add UART pinctrl configurations based on the SoC datasheet and the
downstream Bianbu Linux tree. The drive strength values were taken from
the downstream implementation, which uses medium drive strength.
CTS/RTS are moved to separate *-cts-rts-cfg states so boards can enable
hardware flow control conditionally.

Signed-off-by: Hendrik Hamerlinck <hendrik.hamerlinck@hammernet.be>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Link: https://lore.kernel.org/r/20250917065907.160615-1-hendrik.hamerlinck@hammernet.be
Signed-off-by: Yixun Lan <dlan@gentoo.org>

...

This commit is contained in:

Hendrik Hamerlinck 2025-09-17 08:59:07 +02:00 • committed by Yixun Lan

parent 3a86608788

commit 1187f9b3f6

No known key found for this signature in database

GPG key ID: 31AAEA47594DBBED

1 changed files with 428 additions and 2 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

430

arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi

View file