drm/i915/bxt: Program Tx Rx and Dphy clocks

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BXT DSI clocks are different than previous platforms. So adding a
new function to program following clocks and dividers:
1. Program variable divider to generate input to Tx clock divider
   (Output value must be < 39.5Mhz)
2. Select divide by 2 option to get < 20Mhz for Tx clock
3. Program 8by3 divider to generate Rx clock

v2: Fixed Jani's review comments. Adjusted the Macro definition as
    per convention. Simplified the logic for bit definitions for
    MIPI PORT A and PORT C in same registers.

v3: Refactored the macros for TX, RX Escape and DPHY clocks as per
    Jani's suggestion.

v4: Addressed Jani's review comments.

Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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This commit is contained in:

Shashank Sharma 2015-09-23 23:27:17 +05:30 • committed by Daniel Vetter

parent 37ab0810c9

commit 11b8e4f58e

2 changed files with 104 additions and 0 deletions

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62

drivers/gpu/drm/i915/i915_reg.h

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42

drivers/gpu/drm/i915/intel_dsi_pll.c

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