drm/i915: Enable render context support for Ironlake (gen5)

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Ironlake does support being able to saving and reloading context specific
registers between contexts, providing isolation of the basic GPU state
(as programmable by userspace). This allows userspace to assume that the
GPU retains their state from one batch to the next, minimising the
amount of state it needs to reload, or manually save and restore.

v2: Fix off-by-one in reading CXT_SIZE, and add a comment that the
CXT_SIZE and context-layout do not match in bspec, but the difference is
irrelevant as we overallocate the full page anyway (Ville).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190419111749.3910-2-chris@chris-wilson.co.uk

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Chris Wilson 2019-04-19 12:17:48 +01:00

parent 928f8f4231

commit 1215d28e72

2 changed files with 29 additions and 0 deletions

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16

drivers/gpu/drm/i915/gt/intel_engine_cs.c

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13

drivers/gpu/drm/i915/gt/intel_ringbuffer.c

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