drm/i915: DSPFW and BLC regs are in the display offset range

Browse source

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

...

This commit is contained in:

Jesse Barnes 2013-03-08 10:45:59 -08:00 • committed by Daniel Vetter

parent 4e8c84a5b1

commit 12569ad6ea

1 changed files with 5 additions and 3 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

8

drivers/gpu/drm/i915/i915_reg.h

View file