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- Prioritize the ARM architected timer on Exynos platform when the

Browse source 
architecture is ARM64 (Will Deacon)
 
 - Mark the Exynos timer as a per CPU timer (Will Deacon)
 
 - DT conversion to yaml for the rockchip platform (Ezequiel Garcia)
 
 - Fix IRQ setup if there are two channels on the sh_cmt timer (Phong
   Hoang)
 
 - Use bitfield helper macros in the Ingenic timer (Zhou Yanjie)
 
 - Clear any pending interrupt to prevent an abort of the suspend on
   the Mediatek platform (Fengquan Chen)
 
 - Add DT bindings for new Ingenic SoCs (Zhou Yanjie)
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Merge tag 'timers-v5.15' of https://git.linaro.org/people/daniel.lezcano/linux into timers/core

Pull timer driver updates from Daniel Lezcano:

 - Prioritize the ARM architected timer on Exynos platform when the
   architecture is ARM64 (Will Deacon)

 - Mark the Exynos timer as a per CPU timer (Will Deacon)

 - DT conversion to yaml for the rockchip platform (Ezequiel Garcia)

 - Fix IRQ setup if there are two channels on the sh_cmt timer (Phong
   Hoang)

 - Use bitfield helper macros in the Ingenic timer (Zhou Yanjie)

 - Clear any pending interrupt to prevent an abort of the suspend on
   the Mediatek platform (Fengquan Chen)

 - Add DT bindings for new Ingenic SoCs (Zhou Yanjie)

Link: https://lore.kernel.org/r/c14ad27a-b1c6-6043-0f5e-71dd984bb4ba@linaro.org
This commit is contained in:
Thomas Gleixner 2021-08-26 18:20:50 +02:00
commit 127c92feb7
8 changed files with 143 additions and 66 deletions
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