drm/i915: add WR PLL programming table

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This table is used for programming WR PLL clocks, used by HDMI and DVI outputs.
I split it into a separate patch to simplify the HDMI enabling patch which was
getting huge.

Note that this table is a temporary solution for WR PLL programming. It
will be reworked into a more exact algorithm at a later stage. But for
now, it provides the most accurate clock setting solution, so we use it
here.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Eugeni Dodonov 2012-05-09 15:37:29 -03:00 • committed by Daniel Vetter

parent 7ceae0a55c

commit 12a13a3389

1 changed files with 388 additions and 0 deletions

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drivers/gpu/drm/i915/intel_ddi.c

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