drm/i915/gvt: Introduce a framework for tracking HW registers.

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This patch introduces a framework for tracking HW registers on different
GEN platforms.

Accesses to GEN HW registers from VMs will be trapped by hypervisor. It
will forward these emulation requests to GVT-g device model, which
requires this framework to search for related register descriptions.

Each MMIO entry in this framework describes a GEN HW registers, e.g.
offset, length, whether it contains RO bits, whether it can be accessed by
LRIs...and also emulation handlers for emulating register reading and
writing.

- Use i915 MMIO register definition & statement.(Joonas)

Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

...

This commit is contained in:

Zhi Wang 2016-08-30 11:06:17 +08:00 • committed by Zhenyu Wang

parent 28a60dee2c

commit 12d14cc43b

5 changed files with 379 additions and 9 deletions

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2

drivers/gpu/drm/i915/gvt/Makefile

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30

drivers/gpu/drm/i915/gvt/gvt.c

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20

drivers/gpu/drm/i915/gvt/gvt.h

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247

drivers/gpu/drm/i915/gvt/handlers.c

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89

drivers/gpu/drm/i915/gvt/mmio.h

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