drm/amd/display: Fix detection of aligned DMUB firmware meta info

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[Why]
A built firmware binary may be aligned to 16-bytes with padding at the
end as necessary. In the case that padding was applied the meta info
will not be detected correctly and we won't be able to allocate the
appropriate firmware and tracebuffer sizes.

[How]
To maintain compatibility with already released firmware where this
occurs we need to try every meta offset from 0..15 inclusive.

Extract out the meta info checker into a helper function that's called
for each of these offsets and exit early when we've found it.

Reviewed-by: Eric Yang <Eric.Yang2@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Nicholas Kazlauskas 2021-11-04 16:52:00 -04:00 • committed by Alex Deucher

parent cfd3f70ebd

commit 1328e395fd

1 changed files with 27 additions and 16 deletions

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drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

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