drm/i915: Simplify the DG1 power well descriptors

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Simplify the definition of DG1 power wells by reusing the identical
RKL DDI/AUX descriptors.

This reorders the DG1 DDI/AUX vs. PW4/5 power wells, but this shouldn't
make a difference (it is the order on RKL and the DDI/AUX power wells
don't have a dependency on PW4/5).

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220414210657.1785773-12-imre.deak@intel.com

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Imre Deak 2022-04-15 00:06:51 +03:00

parent a6394dbbe2

commit 13344a9bdd

1 changed files with 7 additions and 17 deletions

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drivers/gpu/drm/i915/display/intel_display_power_map.c

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