drm/nv50: fix alignment of per-channel fifo cache

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GPU pointer to the structure is shifted right by 10 bits, so we need to
align to 1024 bytes, not 256.

Reported-by: Maarten Maathuis <madman2003@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

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Ben Skeggs 2010-01-18 08:33:04 +10:00

parent 7166647501

commit 134f248bea

1 changed files with 1 additions and 1 deletions

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drivers/gpu/drm/nouveau/nv50_fifo.c

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