arm64: dts: marvell: Drop PCIe I/O ranges from CP11x file

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As an example, Armada 70x0 and 80x0 SoC 0xf9000000 region points to
RUNIT/SPICS0 while it is referenced in the DT as PCIe I/O memory
range. This shows that I/O memory has never been used/working on the
old SoCs despite the region being advertised. As PCIe I/O ranges will
not be supported in newer SoCs using CP11x co-processors, let's
simply drop them. It is not harmful in any case as PCIe device drivers
can do it all with the regular mapped memory anyway.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>

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Miquel Raynal 2019-10-04 16:27:30 +02:00 • committed by Gregory CLEMENT

parent 47cf40af64

commit 1399672e48

4 changed files with 4 additions and 21 deletions

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2

arch/arm64/boot/dts/marvell/armada-70x0.dtsi

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arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi

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4

arch/arm64/boot/dts/marvell/armada-80x0.dtsi

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arch/arm64/boot/dts/marvell/armada-cp11x.dtsi

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