ARM: OMAP3: PM: cpuidle: optimize the PER latency in C1 state

Browse source

One of the main contributors of the low power code latency is
the PER power domain. To optimize the high-performance and
low-latency C1 state, prevent any PER state which is lower
than the CORE state in C1.

Reported and suggested by Kevin Hilman.

Reported-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>

...

This commit is contained in:

Jean Pihet 2012-06-01 17:11:07 +02:00 • committed by Kevin Hilman

parent 063a5d0116

commit 13d65c897e

1 changed files with 22 additions and 19 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

41

arch/arm/mach-omap2/cpuidle34xx.c

View file