drm/i915: Fix chv PCS DW11 register defines

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I managed to fumble the per spline PCS DW11 register defines in:

commit 570e2a747b
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date:   Mon Aug 18 14:42:46 2014 +0300

    drm/i915: Clear TX FIFO reset master override bits on chv

Fortunately the bit in DW0 that was cleared due to this didn't have
any effect as long as the bit we meant to clear was already zero.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
[danvet: Fix commit ref as pointed out by Jani.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

...

This commit is contained in:

Ville Syrjälä 2014-10-16 20:52:32 +03:00 • committed by Daniel Vetter

parent 0039a4b357

commit 142d2eca35

1 changed files with 2 additions and 2 deletions

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drivers/gpu/drm/i915/i915_reg.h

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