Merge branch 'axiennet-mdio-bus-freq'

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Andy Chiu says:

====================
net: axienet: Use a DT property to configure frequency of the MDIO bus

Some FPGA platforms have to set frequency of the MDIO bus lower than 2.5
MHz. Thus, we use a DT property, which is "clock-frequency", to work
with it at boot time. The default 2.5 MHz would be set if the property
is not pressent. Also, factor out mdio enable/disable functions due to
the api change since 253761a0e6.

Changelog:
--- v5 ---
1. Make dt-binding patch prior to the implementation patch.
2. Disable mdio bus in error path.
3. Update description of some functions.
--- v4 ---
1. change MAX_MDIO_FREQ to DEFAULT_MDIO_FREQ as suggested by Andrew.
--- v3 RESEND ---
1. Repost the exact same patch again
--- v3 ---
1. Fix coding style, and make probing of the driver fail if MDC overflow
--- v2 ---
1. Use clock-frequency, as defined in mdio.yaml, to configure MDIO
   clock.
2. Only print out frequency if it is set to a non-standard value.
3. Reduce the scope of axienet_mdio_enable and remove
   axienet_mdio_disable because no one really uses it anymore.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>

...

This commit is contained in:

David S. Miller 2022-11-21 10:36:04 +00:00

parent 62a45b384a 2e1f2c1066

commit 148b1da886

3 changed files with 50 additions and 33 deletions

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2

Documentation/devicetree/bindings/net/xilinx_axienet.txt

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2

drivers/net/ethernet/xilinx/xilinx_axienet.h

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79

drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c

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