PCI: dwc: Log link speed and width if it comes up

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Printing just "link up" isn't very informative for PCI Express. Even if the
link is up, bus performance can degrade to slower speeds or to narrower
width than both Root Port and its partner is capable of. In that case it
would be handy to know the link specifications as early as possible.

If the link comes up, log the link speed (PCIe generation) and width.

Link: https://lore.kernel.org/r/20220624143947.8991-2-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

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Serge Semin 2022-06-24 17:39:33 +03:00 • committed by Bjorn Helgaas

parent 7659806ade

commit 14c4ad125c

1 changed files with 16 additions and 6 deletions

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drivers/pci/controller/dwc/pcie-designware.c

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