ARM: avoid faulting on qemu

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commit 3aaf33bebd upstream.

When qemu starts a kernel in a bare environment, the default SCR has
the AW and FW bits clear, which means that the kernel can't modify
the PSR A or PSR F bits, and means that FIQs and imprecise aborts are
always masked.

When running uboot under qemu, the AW and FW SCR bits are set, and the
kernel functions normally - and this is how real hardware behaves.

Fix this for qemu by ignoring the FIQ bit.

Fixes: 8bafae202c ("ARM: BUG if jumping to usermode address in kernel mode")
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Alex Shi <alex.shi@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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Russell King 2017-11-27 11:22:42 +00:00 • committed by Greg Kroah-Hartman

parent 21e1e6192b

commit 14f13c9d58

1 changed files with 2 additions and 2 deletions

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arch/arm/kernel/entry-header.S

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