drm/amd/display: Enable DTBCLK DTO earlier in the sequence

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[why]
As per programming guide, we need to
enable the virtual pixel clock via DTBCLK
DTO and ungate the clock before we begin
programming OPP/OPTC control registers.
Otherwise, the double-buffered registers
will be left pending until the clocks are enabled.

[how]
Move the DTBCLK DTO programming up to
where we do the legacy DP DTO programming.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Sung Joon Kim <sungjoon.kim@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

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Sung Joon Kim 2024-03-19 13:08:52 -04:00 • committed by Alex Deucher

parent 5db346c256

commit 14f9db4271

1 changed files with 16 additions and 16 deletions

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drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

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