staging: rtl8723bs: replace beacon timing magic numbers with named constants

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Break down the 0x6404 and 0x660F in rtl8723b_InitBeaconParameters()
as requested by the TODO in the source.

REG_TBTT_PROHIBIT (0x0540): 0x6404 = hold (0x64) and setup (0x04),
both in 32us ticks.  Same layout as rtw88 (WLAN_TBTT_HOLD_TIME << 8 |
WLAN_TBTT_PROHIBIT in rtw88.h).

REG_BCNTCFG (0x0510): 0x660F is an EDCA-like register.  Lower byte is
AIFS (0x0F = no contention before beacon), next nibble is CWmin (0x06),
top nibble is CWmax (0x06).  Confirmed by rtl8192du/rtl8723ae in the
tree which write 0x66FF (test chips) and 0x660F (production) — only
AIFS varies, the CW byte stays 0x66.

The out-of-tree driver that Dan linked in the TODO discussion was the
reference for the bit assignments:
Link: https://lore.kernel.org/all/aiGMXBNQ0TbIGbpP@stanley.mountain/

Drop the TODO since this was the last thing it referenced.

Signed-off-by: Jad Keskes <inasj268@gmail.com>
Reviewed-by: Dan Carpenter <error27@gmail.com>
Link: https://patch.msgid.link/20260708150930.1813224-1-inasj268@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

...

This commit is contained in:

Jad Keskes 2026-07-08 16:09:30 +01:00 • committed by Greg Kroah-Hartman

parent 02c0c55237

commit 153ff286d0

2 changed files with 15 additions and 3 deletions

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5

drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c

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13

drivers/staging/rtl8723bs/include/rtl8723b_hal.h

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