MIPS: lantiq: fix bootselect bits on XRX200 SoC

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The XRX200 SoC family has a different register layout for reading the boot
selection bits.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4519

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John Crispin 2012-11-09 13:31:51 +01:00

parent a15d129a35

commit 15753b6586

1 changed files with 15 additions and 7 deletions

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arch/mips/lantiq/xway/reset.c

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