clk: spear3xx: Use proper control register offset

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The control register is at offset 0x10, not 0x0. This is wreckaged
since commit 5df33a62c (SPEAr: Switch to common clock framework).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: stable@vger.kernel.org
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

...

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Thomas Gleixner 2014-06-19 21:52:23 +00:00 • committed by Mike Turquette

parent c556bcddc7

commit 15ebb05248

1 changed files with 1 additions and 1 deletions

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drivers/clk/spear/spear3xx_clock.c

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