gpio: aspeed: Add banks Y, Z, AA, AB and AC

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This is less straight-forward than one would hope, as some banks only
have 4 pins rather than 8, others are output only, yet more (W and
X, already supported) are input-only, and in the case of the g4 SoC bank
AC doesn't exist.

Add some structs to describe the varying properties of different banks
and integrate mechanisms to deny requests for unsupported
configurations.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

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Andrew Jeffery 2017-01-24 16:46:46 +10:30 • committed by Linus Walleij

parent 8ccb6dc6e9

commit 1736f75d35

1 changed files with 160 additions and 14 deletions

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174

drivers/gpio/gpio-aspeed.c

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