drm/amd/display: correctly populate dcn315 clock table

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Fix incorrect pstate read order as well as min and max state logic.

Tested-by: Mark Broadworth <mark.broadworth@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Dmytro Laktyushkin 2022-10-20 11:46:35 -04:00 • committed by Alex Deucher

parent 0094f042f2

commit 174fc82410

1 changed files with 23 additions and 48 deletions

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drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

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